Hi Stephen
> > > > + .recalc_rate= clk74_recalc_rate,
> > > > + .get_parent = clk74_get_parent,
> > > > +};
> > >
> > > Can this all be handled by the 'gpio-mux-clock' compatible/driver? I
> > > suppose it may need an update to add the rounding policy that you want
> > > via
Quoting Kuninori Morimoto (2018-10-11 17:37:30)
> > > + .recalc_rate= clk74_recalc_rate,
> > > + .get_parent = clk74_get_parent,
> > > +};
> >
> > Can this all be handled by the 'gpio-mux-clock' compatible/driver? I
> > suppose it may need an update to add the rounding policy t
Hi Stephen
Thank you for your feedback
> > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> > index 292056b..9cfeb0e 100644
> > --- a/drivers/clk/Kconfig
> > +++ b/drivers/clk/Kconfig
> > @@ -299,5 +299,6 @@ source "drivers/clk/sunxi-ng/Kconfig"
> > source "drivers/clk/tegra/Kconfig"
>
Quoting Kuninori Morimoto (2018-10-09 19:16:48)
> diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> index 292056b..9cfeb0e 100644
> --- a/drivers/clk/Kconfig
> +++ b/drivers/clk/Kconfig
> @@ -299,5 +299,6 @@ source "drivers/clk/sunxi-ng/Kconfig"
> source "drivers/clk/tegra/Kconfig"
> sourc
From: Kuninori Morimoto
74aup1g157gw needs i0 and i1 pin as input, select and output it by
sel gpio pin. This driver adds new 74aup1g157gw as clock multiplexer.
"nxp,74aup1g157gw-clk" will select most closest input as output,
"nxp,74aup1g157gw-audio-clk" will select 48kHz/44.1kHz categorized
in
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