Re: [PATCH 2/2] clk: axi-clkgen: Add support for FPGA info

On 2/10/21 2:15 AM, Alexandru Ardelean wrote: > From: Mircea Caprioru > > This patch adds support for vco maximum and minimum ranges in accordance > with fpga speed grade, voltage, device package, technology and family. This > new information is extracted from two new registers implemented in

Re: [PATCH 2/2] clk: axi-clkgen: Add support for FPGA info

On Wed, Feb 10, 2021 at 12:15:35PM +0200, Alexandru Ardelean wrote: > From: Mircea Caprioru > > This patch adds support for vco maximum and minimum ranges in accordance VCO > with fpga speed grade, voltage, device package, technology and family. This FPGA > new information is extracted from two

[PATCH 2/2] clk: axi-clkgen: Add support for FPGA info

From: Mircea Caprioru This patch adds support for vco maximum and minimum ranges in accordance with fpga speed grade, voltage, device package, technology and family. This new information is extracted from two new registers implemented in the ip core: ADI_REG_FPGA_INFO and ADI_REG_FPGA_VOLTAGE,