Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

Martin Sperl writes: >> On 02.05.2016, at 17:29, Eric Anholt wrote: >> >> Martin Sperl writes: >> On 26.04.2016, at 21:39, Eric Anholt wrote: If the firmware had set up a clock to source from

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

Martin Sperl writes: >> On 02.05.2016, at 17:29, Eric Anholt wrote: >> >> Martin Sperl writes: >> On 26.04.2016, at 21:39, Eric Anholt wrote: If the firmware had set up a clock to source from PLLC, go along with it. But if we're looking for a new parent, we don't want

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

> On 02.05.2016, at 17:29, Eric Anholt wrote: > > Martin Sperl writes: > >>> On 26.04.2016, at 21:39, Eric Anholt wrote: >>> >>> If the firmware had set up a clock to source from PLLC, go along with >>> it. But if we're looking for

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

> On 02.05.2016, at 17:29, Eric Anholt wrote: > > Martin Sperl writes: > >>> On 26.04.2016, at 21:39, Eric Anholt wrote: >>> >>> If the firmware had set up a clock to source from PLLC, go along with >>> it. But if we're looking for a new parent, we don't want to switch it >>> to PLLC

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

Martin Sperl writes: >> On 26.04.2016, at 21:39, Eric Anholt wrote: >> >> If the firmware had set up a clock to source from PLLC, go along with >> it. But if we're looking for a new parent, we don't want to switch it >> to PLLC because the firmware

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

Martin Sperl writes: >> On 26.04.2016, at 21:39, Eric Anholt wrote: >> >> If the firmware had set up a clock to source from PLLC, go along with >> it. But if we're looking for a new parent, we don't want to switch it >> to PLLC because the firmware will force PLLC (and thus the AXI bus >>

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

On 30.04.2016 11:28, Martin Sperl wrote: On 26.04.2016, at 21:39, Eric Anholt wrote: If the firmware had set up a clock to source from PLLC, go along with it. But if we're looking for a new parent, we don't want to switch it to PLLC because the firmware will force PLLC (and

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

On 30.04.2016 11:28, Martin Sperl wrote: On 26.04.2016, at 21:39, Eric Anholt wrote: If the firmware had set up a clock to source from PLLC, go along with it. But if we're looking for a new parent, we don't want to switch it to PLLC because the firmware will force PLLC (and thus the AXI bus

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

> On 26.04.2016, at 21:39, Eric Anholt wrote: > > If the firmware had set up a clock to source from PLLC, go along with > it. But if we're looking for a new parent, we don't want to switch it > to PLLC because the firmware will force PLLC (and thus the AXI bus > clock) to

Re: [PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

> On 26.04.2016, at 21:39, Eric Anholt wrote: > > If the firmware had set up a clock to source from PLLC, go along with > it. But if we're looking for a new parent, we don't want to switch it > to PLLC because the firmware will force PLLC (and thus the AXI bus > clock) to different frequencies

[PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

If the firmware had set up a clock to source from PLLC, go along with it. But if we're looking for a new parent, we don't want to switch it to PLLC because the firmware will force PLLC (and thus the AXI bus clock) to different frequencies during over-temp/under-voltage, without notification to

[PATCH 2/2] clk: bcm2835: Skip PLLC clocks when deciding on a new clock parent

If the firmware had set up a clock to source from PLLC, go along with it. But if we're looking for a new parent, we don't want to switch it to PLLC because the firmware will force PLLC (and thus the AXI bus clock) to different frequencies during over-temp/under-voltage, without notification to