On Mon, Oct 14, 2019 at 12:08 AM Chris Packham
wrote:
Me:
> > I think this should be a chained interrupt handler (see below how to
> > register it).
> >
> > See e.g. drivers/gpio/gpio-ftgpio010.c for an example:
> > change function prototype, no return value, use
> > chained_irq_enter/exit(irqchi
On Fri, 2019-10-11 at 09:43 +0200, Linus Walleij wrote:
> Hi Chris!
>
> Thanks for your patch!
>
> On Fri, Oct 4, 2019 at 3:25 AM Chris Packham
> wrote:
>
> > This driver supports the Chip Common A GPIO controller present on a
> > number of Broadcom switch ASICs with integrated SoCs. The contro
Hi Chris!
Thanks for your patch!
On Fri, Oct 4, 2019 at 3:25 AM Chris Packham
wrote:
> This driver supports the Chip Common A GPIO controller present on a
> number of Broadcom switch ASICs with integrated SoCs. The controller is
> similar to the pinctrl-nsp-gpio and pinctrl-iproc-gpio blocks bu
Hi Chris,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on gpio/for-next]
[cannot apply to v5.4-rc1 next-20191003]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to sp
Hi Chris,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on gpio/for-next]
[cannot apply to v5.4-rc1 next-20191003]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify
This driver supports the Chip Common A GPIO controller present on a
number of Broadcom switch ASICs with integrated SoCs. The controller is
similar to the pinctrl-nsp-gpio and pinctrl-iproc-gpio blocks but
different enough that a separate driver is required.
This has been ported from Broadcom's XL
6 matches
Mail list logo
