min_cbm_bits could be 1 or 2 for L3 cache. Kenrel does check the bits
when writting mask. Unfortunately it's not exported to userspace. This
patch fixes the gap.
Signed-off-by: Shaohua Li
---
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c | 16
1 file changed, 16
min_cbm_bits could be 1 or 2 for L3 cache. Kenrel does check the bits
when writting mask. Unfortunately it's not exported to userspace. This
patch fixes the gap.
Signed-off-by: Shaohua Li
---
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c | 16
1 file changed, 16 insertions(+)
diff
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