Re: [PATCH 2/2] irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum

2016-05-04 Thread Marc Zyngier
Hi Ray, On 04/05/16 17:20, Ray Jui wrote: > Hi Marc, > > On 5/4/2016 12:49 AM, Marc Zyngier wrote: >> On 04/05/16 00:47, Ray Jui wrote: >>> Alex Barba discovered Broadcom NS2 GICv2m >>> implementation has an erratum where the MSI data needs to be the SPI >>> number subtracted by an offset of 32,

Re: [PATCH 2/2] irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum

2016-05-04 Thread Ray Jui
Hi Marc, On 5/4/2016 12:49 AM, Marc Zyngier wrote: On 04/05/16 00:47, Ray Jui wrote: Alex Barba discovered Broadcom NS2 GICv2m implementation has an erratum where the MSI data needs to be the SPI number subtracted by an offset of 32, for the correct MSI interrupt to be triggered. We are aware

Re: [PATCH 2/2] irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum

2016-05-04 Thread Marc Zyngier
On 04/05/16 00:47, Ray Jui wrote: > Alex Barba discovered Broadcom NS2 GICv2m > implementation has an erratum where the MSI data needs to be the SPI > number subtracted by an offset of 32, for the correct MSI interrupt to > be triggered. > > We are aware that APM X-Gene GICv2m has a similar errat

[PATCH 2/2] irqchip/gic-v2m: Add workaround for Broadcom NS2 GICv2m erratum

2016-05-03 Thread Ray Jui
Alex Barba discovered Broadcom NS2 GICv2m implementation has an erratum where the MSI data needs to be the SPI number subtracted by an offset of 32, for the correct MSI interrupt to be triggered. We are aware that APM X-Gene GICv2m has a similar erratum where the MSI data needs to be the offset f