On 7/14/20 5:01 AM, Peter Zijlstra wrote:
On Mon, Jul 13, 2020 at 10:48:00PM -0400, Waiman Long wrote:
Storing the cpu number into the lock can be useful for other reason too. It
is not totally related to PPC support.
Well, the thing you did only works for 'small' (<253 CPU) systems.
There's a
On Mon, Jul 13, 2020 at 10:48:00PM -0400, Waiman Long wrote:
> Storing the cpu number into the lock can be useful for other reason too. It
> is not totally related to PPC support.
Well, the thing you did only works for 'small' (<253 CPU) systems.
There's a number of Power systems that's distinctly
On 7/13/20 12:17 AM, Nicholas Piggin wrote:
Excerpts from Waiman Long's message of July 13, 2020 9:05 am:
On 7/12/20 1:34 PM, Peter Zijlstra wrote:
On Sat, Jul 11, 2020 at 02:21:28PM -0400, Waiman Long wrote:
The previous patch enables native qspinlock to store lock holder cpu
number into the
On Sun, Jul 12, 2020 at 07:05:36PM -0400, Waiman Long wrote:
> On 7/12/20 1:34 PM, Peter Zijlstra wrote:
> > And this kills it,.. if it doesn't make unconditional sense, we're not
> > going to do this. It's just too ugly.
> >
> You mean it has to be unconditional, no option config if we want to d
Excerpts from Waiman Long's message of July 13, 2020 9:05 am:
> On 7/12/20 1:34 PM, Peter Zijlstra wrote:
>> On Sat, Jul 11, 2020 at 02:21:28PM -0400, Waiman Long wrote:
>>> The previous patch enables native qspinlock to store lock holder cpu
>>> number into the lock word when the lock is acquired
On 7/12/20 1:34 PM, Peter Zijlstra wrote:
On Sat, Jul 11, 2020 at 02:21:28PM -0400, Waiman Long wrote:
The previous patch enables native qspinlock to store lock holder cpu
number into the lock word when the lock is acquired via the slowpath.
Since PV qspinlock uses atomic unlock, allowing the fa
On Sat, Jul 11, 2020 at 02:21:28PM -0400, Waiman Long wrote:
> The previous patch enables native qspinlock to store lock holder cpu
> number into the lock word when the lock is acquired via the slowpath.
> Since PV qspinlock uses atomic unlock, allowing the fastpath and
> slowpath to put different
The previous patch enables native qspinlock to store lock holder cpu
number into the lock word when the lock is acquired via the slowpath.
Since PV qspinlock uses atomic unlock, allowing the fastpath and
slowpath to put different values into the lock word will further slow
down the performance. Thi
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