Hi,
On Thu, Sep 27, 2018 at 4:00 AM Veerabhadrarao Badiganti
wrote:
>
> Hi Doug,
>
>
> On 9/26/2018 3:58 AM, Doug Anderson wrote:
> > Hi,
> >
> > On Tue, Sep 25, 2018 at 8:05 AM Veerabhadrarao Badiganti
> > wrote:
> >> + /*
> >> +* Whenever core-clock is gated dynamically, it's need
Hi Doug,
On 9/26/2018 3:58 AM, Doug Anderson wrote:
Hi,
On Tue, Sep 25, 2018 at 8:05 AM Veerabhadrarao Badiganti
wrote:
+ /*
+* Whenever core-clock is gated dynamically, it's needed to
+* re-initialize the DLL when the clock is ungated.
+*/
+ if (msm_host-
Hi,
On Tue, Sep 25, 2018 at 8:05 AM Veerabhadrarao Badiganti
wrote:
> + /*
> +* Whenever core-clock is gated dynamically, it's needed to
> +* re-initialize the DLL when the clock is ungated.
> +*/
> + if (msm_host->restore_dll_cfg_needed && msm_host->clk_rate)
On few SDHCI-MSM controllers, the host controller's clock tuning
circuit may go out of sync if controller clocks are gated which
eventually will result in data CRC, command CRC/timeout errors.
To overcome this h/w limitation, the DLL needs to be re-initialized
and restored with its old settings onc
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