On Thu, Jan 14, 2021 at 8:48 AM Bjorn Helgaas wrote:
>
> [+cc Rafael, suspend/resume expert]
>
> On Wed, Jan 13, 2021 at 01:16:23PM +1100, Victor Ding wrote:
> > On Wed, Jan 13, 2021 at 9:38 AM Bjorn Helgaas wrote:
> > > On Tue, Jan 12, 2021 at 04:02:05AM +, Victor Ding wrote:
> > > > GL9750
[+cc Rafael, suspend/resume expert]
On Wed, Jan 13, 2021 at 01:16:23PM +1100, Victor Ding wrote:
> On Wed, Jan 13, 2021 at 9:38 AM Bjorn Helgaas wrote:
> > On Tue, Jan 12, 2021 at 04:02:05AM +, Victor Ding wrote:
> > > GL9750 has a 3100us PortTPowerOnTime; however, it enters L1.2 after
> > >
On Wed, Jan 13, 2021 at 9:38 AM Bjorn Helgaas wrote:
>
> On Tue, Jan 12, 2021 at 04:02:05AM +, Victor Ding wrote:
> > GL9750 has a 3100us PortTPowerOnTime; however, it enters L1.2 after
> > only ~4us inactivity per PCIe trace. During a suspend/resume process,
> > PCI access operations are
On Tue, Jan 12, 2021 at 04:02:05AM +, Victor Ding wrote:
> GL9750 has a 3100us PortTPowerOnTime; however, it enters L1.2 after
> only ~4us inactivity per PCIe trace. During a suspend/resume process,
> PCI access operations are frequently longer than 4us apart.
> Therefore, the device
GL9750 has a 3100us PortTPowerOnTime; however, it enters L1.2 after
only ~4us inactivity per PCIe trace. During a suspend/resume process,
PCI access operations are frequently longer than 4us apart.
Therefore, the device frequently enters and leaves L1.2 during this
process, causing longer than
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