Re: [PATCH 2/2] mmc: tegra: Implement ->set_dma_mask()

2019-09-22 Thread Adrian Hunter
On 20/09/19 5:53 PM, Thierry Reding wrote: > From: Nicolin Chen > > The SDHCI controller on Tegra186 supports 40-bit addressing, which is > usually enough to address all of system memory. However, if the SDHCI > controller is behind an IOMMU, the address space can go beyond. This > happens on Teg

Re: [PATCH 2/2] mmc: tegra: Implement ->set_dma_mask()

2019-09-22 Thread Adrian Hunter
On 20/09/19 5:53 PM, Thierry Reding wrote: > From: Nicolin Chen > > The SDHCI controller on Tegra186 supports 40-bit addressing, which is > usually enough to address all of system memory. However, if the SDHCI > controller is behind an IOMMU, the address space can go beyond. This > happens on Teg

[PATCH 2/2] mmc: tegra: Implement ->set_dma_mask()

2019-09-20 Thread Thierry Reding
From: Nicolin Chen The SDHCI controller on Tegra186 supports 40-bit addressing, which is usually enough to address all of system memory. However, if the SDHCI controller is behind an IOMMU, the address space can go beyond. This happens on Tegra186 and later where the ARM SMMU has an input address