On 07/27/2013 06:11 AM, Laxman Dewangan wrote:
> Hi Stephen,
> Thanks for detail review.
> Agree on most of review. Some info/answer on some of query.
>
> On Saturday 27 July 2013 12:39 AM, Stephen Warren wrote:
>> (Also CC'ing in the DT bindings maintainers, hence quoting all of the
>> binding.)
On 07/27/2013 06:11 AM, Laxman Dewangan wrote:
Hi Stephen,
Thanks for detail review.
Agree on most of review. Some info/answer on some of query.
On Saturday 27 July 2013 12:39 AM, Stephen Warren wrote:
(Also CC'ing in the DT bindings maintainers, hence quoting all of the
binding.)
On
On Sat, Jul 27, 2013 at 03:53:27PM +0530, Laxman Dewangan wrote:
> On Friday 26 July 2013 10:11 PM, Mark Brown wrote:
> >>+ gpio4_sysen1, gpio5_clk32kgaudio_usb_psel, gpio6_sysen2,
> >Would it not be easier to just name the GPIOs gpioN rather than using
> >the full names with the possible
On Sat, Jul 27, 2013 at 03:53:27PM +0530, Laxman Dewangan wrote:
On Friday 26 July 2013 10:11 PM, Mark Brown wrote:
+ gpio4_sysen1, gpio5_clk32kgaudio_usb_psel, gpio6_sysen2,
Would it not be easier to just name the GPIOs gpioN rather than using
the full names with the possible functions?
Hi Stephen,
Thanks for detail review.
Agree on most of review. Some info/answer on some of query.
On Saturday 27 July 2013 12:39 AM, Stephen Warren wrote:
(Also CC'ing in the DT bindings maintainers, hence quoting all of the
binding.)
On 07/26/2013 04:15 AM, Laxman Dewangan wrote:
That field
On Friday 26 July 2013 10:11 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Fri, Jul 26, 2013 at 03:45:54PM +0530, Laxman Dewangan wrote:
+pins: gpio0_id, gpio1_vbus_det_led1_pwm1, gpio2_regen_led2_pwm2,
gpio3_chrg_det,
+ gpio4_sysen1, gpio5_clk32kgaudio_usb_psel,
On Friday 26 July 2013 10:11 PM, Mark Brown wrote:
* PGP Signed by an unknown key
On Fri, Jul 26, 2013 at 03:45:54PM +0530, Laxman Dewangan wrote:
+pins: gpio0_id, gpio1_vbus_det_led1_pwm1, gpio2_regen_led2_pwm2,
gpio3_chrg_det,
+ gpio4_sysen1, gpio5_clk32kgaudio_usb_psel,
Hi Stephen,
Thanks for detail review.
Agree on most of review. Some info/answer on some of query.
On Saturday 27 July 2013 12:39 AM, Stephen Warren wrote:
(Also CC'ing in the DT bindings maintainers, hence quoting all of the
binding.)
On 07/26/2013 04:15 AM, Laxman Dewangan wrote:
That field
(Also CC'ing in the DT bindings maintainers, hence quoting all of the
binding.)
On 07/26/2013 04:15 AM, Laxman Dewangan wrote:
> TI Palam series Power Management IC have multiple pins which can be
S/Palam/Palmas/ right? This name seems to get typo'd an awful lot, both
in this patch and others...
On Fri, Jul 26, 2013 at 03:45:54PM +0530, Laxman Dewangan wrote:
> +pins: gpio0_id, gpio1_vbus_det_led1_pwm1, gpio2_regen_led2_pwm2,
> gpio3_chrg_det,
> + gpio4_sysen1, gpio5_clk32kgaudio_usb_psel, gpio6_sysen2,
> + gpio7_msecure_pwrhold, gpio8_sim1rsti, gpio9_low_vbat,
> +
TI Palam series Power Management IC have multiple pins which can be
configured for different functionality. This pins can be configured
for different function. Also their properties like pull up/down,
open drain enable/disable are configurable.
Add support for pincontrol driver Palmas series
TI Palam series Power Management IC have multiple pins which can be
configured for different functionality. This pins can be configured
for different function. Also their properties like pull up/down,
open drain enable/disable are configurable.
Add support for pincontrol driver Palmas series
On Fri, Jul 26, 2013 at 03:45:54PM +0530, Laxman Dewangan wrote:
+pins: gpio0_id, gpio1_vbus_det_led1_pwm1, gpio2_regen_led2_pwm2,
gpio3_chrg_det,
+ gpio4_sysen1, gpio5_clk32kgaudio_usb_psel, gpio6_sysen2,
+ gpio7_msecure_pwrhold, gpio8_sim1rsti, gpio9_low_vbat,
+
(Also CC'ing in the DT bindings maintainers, hence quoting all of the
binding.)
On 07/26/2013 04:15 AM, Laxman Dewangan wrote:
TI Palam series Power Management IC have multiple pins which can be
S/Palam/Palmas/ right? This name seems to get typo'd an awful lot, both
in this patch and others...
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