Hi Michael,
On Fri, Sep 23, 2016 at 09:03:45PM +1000, Michael Ellerman wrote:
> "Gautham R. Shenoy" writes:
>
> > From: "Gautham R. Shenoy"
> >
> > This patch adds a function named power_enter_stop_lite() that can
> > execute a stop instruction when ESL and EC bits are set to zero in the
> > PS
"Gautham R. Shenoy" writes:
> From: "Gautham R. Shenoy"
>
> This patch adds a function named power_enter_stop_lite() that can
> execute a stop instruction when ESL and EC bits are set to zero in the
> PSSCR. The function handles the wake-up from idle at the instruction
> immediately after the s
Hi Balbir,
On Tue, Sep 20, 2016 at 03:54:43PM +1000, Balbir Singh wrote:
> > diff --git a/arch/powerpc/platforms/powernv/idle.c
> > b/arch/powerpc/platforms/powernv/idle.c
> > index 479c256..c3d3fed 100644
> > --- a/arch/powerpc/platforms/powernv/idle.c
> > +++ b/arch/powerpc/platforms/powernv/id
On 16/09/16 19:47, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> This patch adds a function named power_enter_stop_lite() that can
> execute a stop instruction when ESL and EC bits are set to zero in the
> PSSCR. The function handles the wake-up from idle at the instruction
> immedi
From: "Gautham R. Shenoy"
This patch adds a function named power_enter_stop_lite() that can
execute a stop instruction when ESL and EC bits are set to zero in the
PSSCR. The function handles the wake-up from idle at the instruction
immediately after the stop instruction.
If the flag OPAL_PM_WAK
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