Re: [PATCH 2/2] ptp: Add a ptp clock driver for IDT ClockMatrix.

2019-09-19 Thread Vincent Cheng
Hi Andrew, On Wed, Sep 18, 2019 at 05:18:03PM EDT, Andrew Lunn wrote: >On Wed, Sep 18, 2019 at 04:06:38PM -0400, vincent.cheng...@renesas.com wrote: > >> +static s32 idtcm_xfer(struct idtcm *idtcm, >> + u8 regaddr, >> + u8 *buf, >> + u16 count,

Re: [PATCH 2/2] ptp: Add a ptp clock driver for IDT ClockMatrix.

2019-09-18 Thread kbuild test robot
Hi, Thank you for the patch! Yet something to improve: [auto build test ERROR on linus/master] [cannot apply to v5.3 next-20190918] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base

Re: [PATCH 2/2] ptp: Add a ptp clock driver for IDT ClockMatrix.

2019-09-18 Thread Andrew Lunn
On Wed, Sep 18, 2019 at 04:06:38PM -0400, vincent.cheng...@renesas.com wrote: > From: Vincent Cheng > > The IDT ClockMatrix (TM) family includes integrated devices that provide > eight PLL channels. Each PLL channel can be independently configured as a > frequency synthesizer, jitter

[PATCH 2/2] ptp: Add a ptp clock driver for IDT ClockMatrix.

2019-09-18 Thread vincent . cheng . xh
From: Vincent Cheng The IDT ClockMatrix (TM) family includes integrated devices that provide eight PLL channels. Each PLL channel can be independently configured as a frequency synthesizer, jitter attenuator, digitally controlled oscillator (DCO), or a digital phase lock loop (DPLL). Typically