Re: [PATCH 2/2] riscv: Enable generic clockevent broadcast

2021-03-16 Thread Palmer Dabbelt
On Sat, 06 Mar 2021 18:24:46 PST (-0800), guo...@kernel.org wrote: From: Guo Ren When percpu-timers are stopped by deep power saving mode, we need system timer help to broadcast IPI_TIMER. This is first introduced by broken x86 hardware, where the local apic timer stops in C3 state. But many

Re: [PATCH 2/2] riscv: Enable generic clockevent broadcast

2021-03-06 Thread Anup Patel
On Sun, Mar 7, 2021 at 7:55 AM wrote: > > From: Guo Ren > > When percpu-timers are stopped by deep power saving mode, we > need system timer help to broadcast IPI_TIMER. > > This is first introduced by broken x86 hardware, where the local apic > timer stops in C3 state. But many other

[PATCH 2/2] riscv: Enable generic clockevent broadcast

2021-03-06 Thread guoren
From: Guo Ren When percpu-timers are stopped by deep power saving mode, we need system timer help to broadcast IPI_TIMER. This is first introduced by broken x86 hardware, where the local apic timer stops in C3 state. But many other architectures(powerpc, mips, arm, hexagon, openrisc, sh) have