ooper
> ; Roy Zang ; Mingkai Hu
> ; Stuart Yoder ; Yang-Leo Li
> ; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 2/2 v3] irqchip/Layerscape: Add SCFG MSI controller
> support
>
> On 25/02/16 03:21, Minghuan Lian wrote:
> > Hi Marc,
> >
> > I am sorry fo
On 25/02/16 03:21, Minghuan Lian wrote:
> Hi Marc,
>
> I am sorry for the delayed response due to the Chinese Spring Festival
> holiday.
> Thank you very much for the review.
> Please see my comments inline.
>
> Thanks,
> Minghuan
>
[...]
>>> +static int ls_scfg_msi_probe(struct platform_devi
2016 1:30 AM
> To: Minghuan Lian ;
> linux-arm-ker...@lists.infradead.org
> Cc: Thomas Gleixner ; Jason Cooper
> ; Roy Zang ; Mingkai Hu
> ; Stuart Yoder ; Yang-Leo Li
> ; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH 2/2 v3] irqchip/Layerscape: Add SCFG MSI controller
>
Minguan,
Please CC LKML for any irqchip related patch - see the MAINTAINER file.
On 02/02/16 09:00, Minghuan Lian wrote:
> Some kind of NXP Layerscape SoC provides a MSI
> implementation which uses two SCFG registers MSIIR and
> MSIR to support 32 MSI interrupts for each PCIe controller.
> The pa
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