qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz). Though qup-i2c does not support DVFS, it still needs to vote for a performance state on 'CX' to satisfy the 19.2 MHz clock frequency requirement.
Use 'assigned-performance-states' to pass this information from device tree, and also add the power-domains property to specify the CX power-domain. Signed-off-by: Roja Rani Yarubandi <ro...@codeaurora.org> --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 22b832fc62e3..70d74215ba8b 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -782,6 +782,8 @@ i2c0: i2c@880000 { <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -834,6 +836,8 @@ i2c1: i2c@884000 { <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -886,6 +890,8 @@ i2c2: i2c@888000 { <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -920,6 +926,8 @@ i2c3: i2c@88c000 { <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -972,6 +980,8 @@ i2c4: i2c@890000 { <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -1006,6 +1016,8 @@ i2c5: i2c@894000 { <&aggre1_noc MASTER_QUP_0 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -1073,6 +1085,8 @@ i2c6: i2c@a80000 { <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -1125,6 +1139,8 @@ i2c7: i2c@a84000 { <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -1159,6 +1175,8 @@ i2c8: i2c@a88000 { <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -1211,6 +1229,8 @@ i2c9: i2c@a8c000 { <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -1245,6 +1265,8 @@ i2c10: i2c@a90000 { <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; @@ -1297,6 +1319,8 @@ i2c11: i2c@a94000 { <&aggre2_noc MASTER_QUP_1 0 &mc_virt SLAVE_EBI1 0>; interconnect-names = "qup-core", "qup-config", "qup-memory"; + power-domains = <&rpmhpd SC7180_CX>; + assigned-performance-states = <RPMH_REGULATOR_LEVEL_LOW_SVS>; status = "disabled"; }; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation