在 2016/10/21 1:48, Stephen Boyd 写道:
> On 10/19, Jiancheng Xue wrote:
>>
>> I'm pretty sure that the patch was sent to the DT list
>> devicet...@vger.kernel.org.
>> You had asked a question about "hi3798cv200-sysctrl" and I replied
>> (https://lkml.org/lkml/2016/10/10/517).
>> I'm waiting for yo
On 10/19, Jiancheng Xue wrote:
>
> I'm pretty sure that the patch was sent to the DT list
> devicet...@vger.kernel.org.
> You had asked a question about "hi3798cv200-sysctrl" and I replied
> (https://lkml.org/lkml/2016/10/10/517).
> I'm waiting for your new comments. If there's some misunderstat
在 2016/10/19 10:45, Rob Herring 写道:
> On Tue, Oct 18, 2016 at 9:38 PM, Jiancheng Xue
> wrote:
>>
>>
>> 在 2016/10/18 23:58, Rob Herring 写道:
>>> On Mon, Oct 17, 2016 at 08:07:04PM +0800, Pan Wen wrote:
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates cl
On Tue, Oct 18, 2016 at 9:38 PM, Jiancheng Xue
wrote:
>
>
> 在 2016/10/18 23:58, Rob Herring 写道:
>> On Mon, Oct 17, 2016 at 08:07:04PM +0800, Pan Wen wrote:
>>> Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
>>> Generator) module generates clock and reset signals used
>>> by other module b
在 2016/10/18 23:58, Rob Herring 写道:
> On Mon, Oct 17, 2016 at 08:07:04PM +0800, Pan Wen wrote:
>> Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
>> Generator) module generates clock and reset signals used
>> by other module blocks on SoC.
>>
>> Signed-off-by: Pan Wen
>> ---
>> .../devi
On Mon, Oct 17, 2016 at 08:07:04PM +0800, Pan Wen wrote:
> Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
> Generator) module generates clock and reset signals used
> by other module blocks on SoC.
>
> Signed-off-by: Pan Wen
> ---
> .../devicetree/bindings/clock/hisi-crg.txt |
Add CRG driver for Hi3516CV300 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.
Signed-off-by: Pan Wen
---
.../devicetree/bindings/clock/hisi-crg.txt | 50
drivers/clk/hisilicon/Kconfig | 8 +
dr
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