On 2020-08-06 11:03, Daniel Palmer wrote:
Hi Marc,
On Thu, 6 Aug 2020 at 01:26, Marc Zyngier wrote:
> +struct msc313_intc {
> + struct irq_domain *domain;
> + void __iomem *base;
> + struct irq_chip irqchip;
Why do you need to embed the irq_chip on a per-controller basis?
Curren
Hi Marc,
On Thu, 6 Aug 2020 at 01:26, Marc Zyngier wrote:
> > +struct msc313_intc {
> > + struct irq_domain *domain;
> > + void __iomem *base;
> > + struct irq_chip irqchip;
>
> Why do you need to embed the irq_chip on a per-controller basis?
Current chips have 1 instance of each typ
[+ Mark-PK Tsai]
Hi Daniel,
On 2020-08-05 12:00, Daniel Palmer wrote:
Add a driver for the two peripheral interrupt controllers
in MStar MSC313 and other MStar/Sigmastar Armv7 SoCs.
Supports both the "IRQ" and "FIQ" controllers that
forward interrupts from the various IP blocks inside the
SoC
Add a driver for the two peripheral interrupt controllers
in MStar MSC313 and other MStar/Sigmastar Armv7 SoCs.
Supports both the "IRQ" and "FIQ" controllers that
forward interrupts from the various IP blocks inside the
SoC to the ARM GIC.
They are basically the same thing except for one differen
4 matches
Mail list logo