On 12/06/19 6:08 PM, Raul Rangel wrote:
> On Wed, Jun 12, 2019 at 04:09:47PM +0300, Adrian Hunter wrote:
>> On 10/06/19 9:53 PM, Raul E Rangel wrote:
>>> The O2 controller supports 8-bit EMMC access. mmc_select_bus_width()
>>> will be used to determine if the MMC supports 8-bit or 4-bit access.
>>
On Wed, Jun 12, 2019 at 04:09:47PM +0300, Adrian Hunter wrote:
> On 10/06/19 9:53 PM, Raul E Rangel wrote:
> > The O2 controller supports 8-bit EMMC access. mmc_select_bus_width()
> > will be used to determine if the MMC supports 8-bit or 4-bit access.
>
> The problem is that the bit indicates a
On 10/06/19 9:53 PM, Raul E Rangel wrote:
> The O2 controller supports 8-bit EMMC access. mmc_select_bus_width()
> will be used to determine if the MMC supports 8-bit or 4-bit access.
The problem is that the bit indicates a host controller capability, not how
many data lines there actually are on
The O2 controller supports 8-bit EMMC access. mmc_select_bus_width()
will be used to determine if the MMC supports 8-bit or 4-bit access.
Signed-off-by: Raul E Rangel
---
I tested this on an AMD chromebook.
$ cat /sys/kernel/debug/mmc1/ios
clock: 2 Hz
actual clock: 2
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