Re: [PATCH 2/3] qcom: spmi-gpio: add support for hierarchical IRQ chip

2019-01-05 Thread Brian Masney
On Sat, Jan 05, 2019 at 07:08:44AM -0500, Brian Masney wrote: > > I also seem to recall that GPIO numbering starts from 1 instead of > > 0, so please keep that in mind. > > I'm using the pinctrl numbering, which is zero based. > > / # head /sys/kernel/debug/pinctrl/fc4cf000.spmi\:pm8941@0\:gpios@

Re: [PATCH 2/3] qcom: spmi-gpio: add support for hierarchical IRQ chip

2019-01-05 Thread Brian Masney
On Thu, Jan 03, 2019 at 04:48:33PM -0800, Stephen Boyd wrote: > I'd think we want the interrupt-cells for the pmic gpio controller to be > 2 cells (pin and flags) instead of 4 like you have here to match the > parent interrupt specifier. I originally went with 4 interrupt cells for spmi-gpio to ma

Re: [PATCH 2/3] qcom: spmi-gpio: add support for hierarchical IRQ chip

2019-01-03 Thread Stephen Boyd
Quoting Brian Masney (2018-12-29 03:47:54) > spmi-gpio did not have any irqchip support so consumers of this in > device tree would need to call gpio[d]_to_irq() in order to get the > proper IRQ on the underlying PMIC. IRQ chips in device tree should > be usable from the start without the consumer

[PATCH 2/3] qcom: spmi-gpio: add support for hierarchical IRQ chip

2018-12-29 Thread Brian Masney
spmi-gpio did not have any irqchip support so consumers of this in device tree would need to call gpio[d]_to_irq() in order to get the proper IRQ on the underlying PMIC. IRQ chips in device tree should be usable from the start without the consumer having to make an additional call to get the proper