Hi Neil,
On Wed, Mar 20, 2019 at 9:15 AM Neil Armstrong wrote:
>
> Hi,
>
> There is a typo in the subject "s/sparate/separate/" !
good catch - I'll wait until the weekend and send a fixed version then!
> On 19/03/2019 22:51, Martin Blumenstingl wrote:
> > Meson8, Meson8b and Meson8m2 implement a
Hi,
There is a typo in the subject "s/sparate/separate/" !
On 19/03/2019 22:51, Martin Blumenstingl wrote:
> Meson8, Meson8b and Meson8m2 implement a similar clock controller.
> However, there are a few differences between the three actual IP blocks.
>
> One example where Meson8m2 differs from M
Meson8, Meson8b and Meson8m2 implement a similar clock controller.
However, there are a few differences between the three actual IP blocks.
One example where Meson8m2 differs from Meson8b is the VPU clock setup:
- the VPU input mux can choose between "fclk_div4", "fclk_div3",
"fclk_div5" and "fc
3 matches
Mail list logo