On 21/06/2019 12:34, claudiu.bez...@microchip.com wrote:
> Hi Daniel,
>
> On 20.06.2019 11:53, Daniel Lezcano wrote:
>> Hi Claudiu,
>>
>> sorry for the late reply.
>
> No problem, I understand.
>
>>
>>
>> On 13/06/2019 16:12, claudiu.bez...@microchip.com wrote:
>>> Hi Daniel,
>>>
>>> On
Hi Daniel,
On 20.06.2019 11:53, Daniel Lezcano wrote:
> Hi Claudiu,
>
> sorry for the late reply.
No problem, I understand.
>
>
> On 13/06/2019 16:12, claudiu.bez...@microchip.com wrote:
>> Hi Daniel,
>>
>> On 31.05.2019 13:41, Daniel Lezcano wrote:
>>>
>>> Hi Claudiu,
>>>
>>>
>>> On
Hi Claudiu,
sorry for the late reply.
On 13/06/2019 16:12, claudiu.bez...@microchip.com wrote:
> Hi Daniel,
>
> On 31.05.2019 13:41, Daniel Lezcano wrote:
>>
>> Hi Claudiu,
>>
>>
>> On 30/05/2019 09:46, claudiu.bez...@microchip.com wrote:
>>> Hi Daniel,
>>>
>>> Taking into account the
Hi Daniel,
On 31.05.2019 13:41, Daniel Lezcano wrote:
>
> Hi Claudiu,
>
>
> On 30/05/2019 09:46, claudiu.bez...@microchip.com wrote:
>> Hi Daniel,
>>
>> Taking into account the discussion on this tread and the fact that we have
>> no answer from Rob on this topic (I'm talking about [1]), what
Hi Claudiu,
On 30/05/2019 09:46, claudiu.bez...@microchip.com wrote:
> Hi Daniel,
>
> Taking into account the discussion on this tread and the fact that we have
> no answer from Rob on this topic (I'm talking about [1]), what do you think
> it would be best for this driver to be accepted the
Hi Daniel,
Taking into account the discussion on this tread and the fact that we have
no answer from Rob on this topic (I'm talking about [1]), what do you think
it would be best for this driver to be accepted the soonest? Would it be OK
for you to mimic the approach done by:
On 08/04/2019 15:22:50+0200, Daniel Lezcano wrote:
> On 08/04/2019 14:42, Alexandre Belloni wrote:
> > On 08/04/2019 14:35:05+0200, Daniel Lezcano wrote:
> >>
> >> What about commit 51f0aeb2d21f1 ?
> >>
> >
> > Well, do you see anything parsing that in drivers/clocksource ?
>
> So to make it
On 08/04/2019 14:42, Alexandre Belloni wrote:
> On 08/04/2019 14:35:05+0200, Daniel Lezcano wrote:
>>
>> What about commit 51f0aeb2d21f1 ?
>>
>
> Well, do you see anything parsing that in drivers/clocksource ?
So to make it clear:
1. You say I said anything, emphasis this word in the previous
On 08/04/2019 14:35:05+0200, Daniel Lezcano wrote:
>
> What about commit 51f0aeb2d21f1 ?
>
Well, do you see anything parsing that in drivers/clocksource ?
--
Alexandre Belloni, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
On 08/04/2019 14:11, Alexandre Belloni wrote:
> Hi Daniel,
>
> On 08/04/2019 10:43:26+0200, Daniel Lezcano wrote:
>> Hi Claudiu,
>>
>> On 14/03/2019 17:26, claudiu.bez...@microchip.com wrote:
>>> From: Claudiu Beznea
>>>
>>> Add driver for Microchip PIT64B timer. Timer could be used in
Hi Daniel,
On 08/04/2019 10:43:26+0200, Daniel Lezcano wrote:
> Hi Claudiu,
>
> On 14/03/2019 17:26, claudiu.bez...@microchip.com wrote:
> > From: Claudiu Beznea
> >
> > Add driver for Microchip PIT64B timer. Timer could be used in continuous
> > mode or oneshot mode. The hardware has 2x32 bit
Hi Daniel,
On 08.04.2019 11:43, Daniel Lezcano wrote:
> External E-Mail
>
>
> Hi Claudiu,
>
> On 14/03/2019 17:26, claudiu.bez...@microchip.com wrote:
>> From: Claudiu Beznea
>>
>> Add driver for Microchip PIT64B timer. Timer could be used in continuous
>> mode or oneshot mode. The hardware
Hi Claudiu,
On 14/03/2019 17:26, claudiu.bez...@microchip.com wrote:
> From: Claudiu Beznea
>
> Add driver for Microchip PIT64B timer. Timer could be used in continuous
> mode or oneshot mode. The hardware has 2x32 bit registers for period
> emulating a 64 bit timer. The LSB_PR and MSB_PR
On 14/03/2019 at 17:26, Claudiu Beznea - M18063 wrote:
> From: Claudiu Beznea
>
> Add driver for Microchip PIT64B timer. Timer could be used in continuous
> mode or oneshot mode. The hardware has 2x32 bit registers for period
> emulating a 64 bit timer. The LSB_PR and MSB_PR registers are used
From: Claudiu Beznea
Add driver for Microchip PIT64B timer. Timer could be used in continuous
mode or oneshot mode. The hardware has 2x32 bit registers for period
emulating a 64 bit timer. The LSB_PR and MSB_PR registers are used to set
the period value (compare value). TLSB and TMSB keeps the
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