[PATCH 2/5] drivers/soc/fsl: add EPU FSM configuration for deep sleep

In the last stage of deep sleep, software will trigger a Finite State Machine (FSM) to control the hardware procedure, such a board isolation, killing PLLs, removing power, and so on. When the system is waked up by an interrupt, the FSM controls the hardware to complete the early resume

[PATCH 2/5] drivers/soc/fsl: add EPU FSM configuration for deep sleep

In the last stage of deep sleep, software will trigger a Finite State Machine (FSM) to control the hardware procedure, such a board isolation, killing PLLs, removing power, and so on. When the system is waked up by an interrupt, the FSM controls the hardware to complete the early resume