On 19/10/2020 16:07, Fabien Parent wrote:
The MediaTek PWM IP can sometimes use the 26MHz source clock to generate
the PWM signal, but the driver currently assumes that we always use
the PWM bus clock to generate the PWM signal.
This commit modifies the PWM driver in order to force the PWM
The MediaTek PWM IP can sometimes use the 26MHz source clock to generate
the PWM signal, but the driver currently assumes that we always use
the PWM bus clock to generate the PWM signal.
This commit modifies the PWM driver in order to force the PWM IP to
always use the bus clock as source clock.
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