From: Icenowy Zheng
Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: Icenowy Zheng
---
arch/ar
在 2017-10-16 20:06,Maxime Ripard 写道:
On Mon, Oct 16, 2017 at 05:39:58PM +0800, icen...@aosc.io wrote:
在 2017-10-16 17:32,Maxime Ripard 写道:
> On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
> > >> +interrupts = ;
> > >> +clocks = <&ccu CLK_BU
On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
> >> + interrupts = ;
> >> + clocks = <&ccu CLK_BUS_OHCI1>,
> >> + <&ccu CLK_BUS_EHCI1>,
> >> + <&ccu CLK_USB_OHCI1>;
> >> + resets =
在 2017-10-16 17:32,Maxime Ripard 写道:
On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
>> + interrupts = ;
>> + clocks = <&ccu CLK_BUS_OHCI1>,
>> + <&ccu CLK_BUS_EHCI1>,
>> + <&ccu
On Mon, Oct 16, 2017 at 05:39:58PM +0800, icen...@aosc.io wrote:
> 在 2017-10-16 17:32,Maxime Ripard 写道:
> > On Tue, Oct 10, 2017 at 07:24:28AM +0800, Icenowy Zheng wrote:
> > > >> + interrupts = ;
> > > >> + clocks = <&ccu CLK_BUS_OHCI1>,
> > > >> +
On Sun, Oct 08, 2017 at 04:29:02AM +, Icenowy Zheng wrote:
> From: Icenowy Zheng
>
> Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
>
> Add support for the host ports in the DTSI file.
>
> The OTG controller still cannot work with existing compatibles, and needs
> more in
于 2017年10月10日 GMT+08:00 上午5:03:40, Maxime Ripard
写到:
>On Sun, Oct 08, 2017 at 04:29:02AM +, Icenowy Zheng wrote:
>> From: Icenowy Zheng
>>
>> Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
>>
>> Add support for the host ports in the DTSI file.
>>
>> The OTG controller
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