Στις 2019-03-13 00:08, Anup Patel έγραψε:
Currently, we have to boot RISCV64 kernel from a 2MB aligned physical
address and RISCV32 kernel from a 4MB aligned physical address. This
constraint is because initial pagetable setup (i.e. setup_vm()) maps
entire RAM using hugepages (i.e. 2MB for 3-leve
On Mon, Mar 18, 2019 at 06:46:18PM +0530, Anup Patel wrote:
> On Mon, Mar 18, 2019 at 12:48 PM Mike Rapoport wrote:
> >
> > On Sat, Mar 16, 2019 at 04:55:30AM +0530, Anup Patel wrote:
> > > On Fri, Mar 15, 2019 at 9:52 PM Anup Patel wrote:
> > > >
> > > > On Fri, Mar 15, 2019 at 9:28 PM Mike Rapo
On Mon, 18 Mar 2019, Mike Rapoport wrote:
> On Sat, Mar 16, 2019 at 04:55:30AM +0530, Anup Patel wrote:
>
> > We started exploring ways to re-claim memory below kernel because
> > we are trying to get Linux working on Kendryte K210 board
> > (https://kendryte.com/). This board has dual-core 64bit
On Mon, Mar 18, 2019 at 12:48 PM Mike Rapoport wrote:
>
> On Sat, Mar 16, 2019 at 04:55:30AM +0530, Anup Patel wrote:
> > On Fri, Mar 15, 2019 at 9:52 PM Anup Patel wrote:
> > >
> > > On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
> > > >
> > > > I still don't get why it is that important
On Sat, Mar 16, 2019 at 04:55:30AM +0530, Anup Patel wrote:
> On Fri, Mar 15, 2019 at 9:52 PM Anup Patel wrote:
> >
> > On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
> > >
> > > I still don't get why it is that important to relax alignment of the
> > > kernel
> > > load address. Provided
On Fri, Mar 15, 2019 at 9:52 PM Anup Patel wrote:
>
> On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
> >
> > On Thu, Mar 14, 2019 at 11:28:32PM +0530, Anup Patel wrote:
> > > On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
> > > >
> > > > On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anu
On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
>
> On Thu, Mar 14, 2019 at 11:28:32PM +0530, Anup Patel wrote:
> > On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
> > >
> > > On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> > > > On Thu, Mar 14, 2019 at 12:01 AM Mike Rapo
On Fri, Mar 15, 2019 at 9:28 PM Mike Rapoport wrote:
>
> On Thu, Mar 14, 2019 at 11:28:32PM +0530, Anup Patel wrote:
> > On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
> > >
> > > On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> > > > On Thu, Mar 14, 2019 at 12:01 AM Mike Rapo
On Thu, Mar 14, 2019 at 11:28:32PM +0530, Anup Patel wrote:
> On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
> >
> > On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> > > On Thu, Mar 14, 2019 at 12:01 AM Mike Rapoport wrote:
> > > >
> > > > On Tue, Mar 12, 2019 at 10:08:22PM +0
On Thu, Mar 14, 2019 at 12:23 PM Mike Rapoport wrote:
>
> On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> > On Thu, Mar 14, 2019 at 12:01 AM Mike Rapoport wrote:
> > >
> > > On Tue, Mar 12, 2019 at 10:08:22PM +, Anup Patel wrote:
> > > > Currently, we have to boot RISCV64 kernel
On Thu, Mar 14, 2019 at 02:36:01AM +0530, Anup Patel wrote:
> On Thu, Mar 14, 2019 at 12:01 AM Mike Rapoport wrote:
> >
> > On Tue, Mar 12, 2019 at 10:08:22PM +, Anup Patel wrote:
> > > Currently, we have to boot RISCV64 kernel from a 2MB aligned physical
> > > address and RISCV32 kernel from
On Thu, Mar 14, 2019 at 12:01 AM Mike Rapoport wrote:
>
> On Tue, Mar 12, 2019 at 10:08:22PM +, Anup Patel wrote:
> > Currently, we have to boot RISCV64 kernel from a 2MB aligned physical
> > address and RISCV32 kernel from a 4MB aligned physical address. This
> > constraint is because initial
On Tue, Mar 12, 2019 at 10:08:22PM +, Anup Patel wrote:
> Currently, we have to boot RISCV64 kernel from a 2MB aligned physical
> address and RISCV32 kernel from a 4MB aligned physical address. This
> constraint is because initial pagetable setup (i.e. setup_vm()) maps
> entire RAM using hugepa
Currently, we have to boot RISCV64 kernel from a 2MB aligned physical
address and RISCV32 kernel from a 4MB aligned physical address. This
constraint is because initial pagetable setup (i.e. setup_vm()) maps
entire RAM using hugepages (i.e. 2MB for 3-level pagetable and 4MB for
2-level pagetable).
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