Re: [PATCH 3/3] soc: qcom: llcc-qcom: Add support for SM8250 SoC

2020-11-27 Thread Manivannan Sadhasivam
Hi Sai, On Fri, Nov 27, 2020 at 07:09:09PM +0530, Sai Prakash Ranjan wrote: > Hi Mani, > > On 2020-11-27 17:41, Manivannan Sadhasivam wrote: > > SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register > > needs to be written to enable the Write Sub Cache for each SCID. Hence, > >

Re: [PATCH 3/3] soc: qcom: llcc-qcom: Add support for SM8250 SoC

2020-11-27 Thread Sai Prakash Ranjan
Hi Mani, On 2020-11-27 17:41, Manivannan Sadhasivam wrote: SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register needs to be written to enable the Write Sub Cache for each SCID. Hence, use a dedicated "write_scid_en" member with predefined values and write them for SoCs enabl

[PATCH 3/3] soc: qcom: llcc-qcom: Add support for SM8250 SoC

2020-11-27 Thread Manivannan Sadhasivam
SM8250 SoC uses LLCC IP version 2. In this version, the WRSC_EN register needs to be written to enable the Write Sub Cache for each SCID. Hence, use a dedicated "write_scid_en" member with predefined values and write them for SoCs enabling the "llcc_v2" flag. Signed-off-by: Manivannan Sadhasivam