[PATCH 3/4] x86: disallow running with 32-bit PTEs to work around erratum

2016-07-07 Thread Dave Hansen
From: Dave Hansen The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights Landing) has an erratum where a processor thread setting the Accessed or Dirty bits may not do so atomically against its checks for the Present bit. This may cause a thread (which is about to page fault) to set

Re: [PATCH 3/4] x86: disallow running with 32-bit PTEs to work around erratum

2016-07-06 Thread Dave Hansen
On 07/03/2016 09:20 PM, Hillf Danton wrote: ... >> When we have 64-bit PTEs (64-bit mode or 32-bit PAE), we were able >> to move the swap PTE format around to avoid these troublesome bits. >> But, 32-bit non-PAE is tight on bits. So, disallow it from running >> on this hardware. I can't imagine a

Re: [PATCH 3/4] x86: disallow running with 32-bit PTEs to work around erratum

2016-07-03 Thread Hillf Danton
> > The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights > Landing) has an erratum where a processor thread setting the Accessed > or Dirty bits may not do so atomically against its checks for the > Present bit. This may cause a thread (which is about to page fault) > to set A and/o

[PATCH 3/4] x86: disallow running with 32-bit PTEs to work around erratum

2016-07-01 Thread Dave Hansen
The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights Landing) has an erratum where a processor thread setting the Accessed or Dirty bits may not do so atomically against its checks for the Present bit. This may cause a thread (which is about to page fault) to set A and/or D, even th