Re: [PATCH 3/5] clk: ingenic/jz4770: Fix incorrect dividers for main clocks

Quoting Paul Cercueil (2019-05-02 14:25:00) > The main clocks (cclk, h0clk, h1clk, h2clk, c1clk, pclk) were using > incorrect dividers, and thus reported an incorrect rate. > > Signed-off-by: Paul Cercueil > --- Applied to clk-next

[PATCH 3/5] clk: ingenic/jz4770: Fix incorrect dividers for main clocks

The main clocks (cclk, h0clk, h1clk, h2clk, c1clk, pclk) were using incorrect dividers, and thus reported an incorrect rate. Signed-off-by: Paul Cercueil --- drivers/clk/ingenic/jz4770-cgu.c | 34 ++-- 1 file changed, 28 insertions(+), 6 deletions(-) diff --git a/dri