[PATCH 3/5] x86/kernel: Drastically reduce the number of firmware bug warnings

2017-10-12 Thread mike.travis
Prior to the TSC ADJUST MSR being available, the method to set TSC's in sync with each other naturally caused a small skew between cpu threads. This was NOT a firmware bug at the time so introducing a whole avalanche of alarming warning messages might cause unnecessary concern and customer complain

[PATCH 3/5] x86/kernel: Drastically reduce the number of firmware bug warnings

2017-10-05 Thread mike.travis
Prior to the TSC ADJUST MSR being available, the method to set TSC's in sync with each other naturally caused a small skew between cpu threads. This was NOT a firmware bug at the time so introducing a whole avalanche of alarming warning messages might cause unnecessary concern and customer complain

[PATCH 3/5] x86/kernel: Drastically reduce the number of firmware bug warnings

2017-10-02 Thread mike.travis
Prior to the TSC ADJUST MSR being available, the method to set TSC's in sync with each other naturally caused a small skew between cpu threads. This was NOT a firmware bug at the time so introducing a whole avalanche of alarming warning messages might cause unnecessary concern and customer complain