3.14-stable review patch. If anyone has any objections, please let me know.
--
From: Timothy Pearson
commit 2d02b8bdba322b527c5f5168ce1ca10c2d982a78 upstream.
During DRAM initialization on certain ASpeed devices, an incorrect
bit (bit 10)
3.14-stable review patch. If anyone has any objections, please let me know.
--
From: Timothy Pearson
commit 2d02b8bdba322b527c5f5168ce1ca10c2d982a78 upstream.
During DRAM initialization on certain ASpeed devices, an incorrect
bit (bit 10) was checked in the "SDRAM Bus Width
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