[PATCH 4/4] RISC-V: Allow userspace to flush the instruction cache

From: Andrew Waterman Despite RISC-V having a direct 'fence.i' instruction available to userspace (which we can't trap!), that's not actually viable when running on Linux because the kernel might schedule a process on another hart. There is no way for userspace to handle this

[PATCH 4/4] RISC-V: Allow userspace to flush the instruction cache

From: Andrew Waterman Despite RISC-V having a direct 'fence.i' instruction available to userspace (which we can't trap!), that's not actually viable when running on Linux because the kernel might schedule a process on another hart. There is no way for userspace to handle this without invoking