Re: [PATCH 4/4] RISC-V: Fix non-smp kernel boot on SMP systems

2018-12-08 Thread Palmer Dabbelt
On Fri, 07 Dec 2018 09:20:57 PST (-0800), a...@brainfault.org wrote: On Fri, 7 Dec, 2018, 10:30 PM Palmer Dabbelt On Mon, 03 Dec 2018 12:57:31 PST (-0800), atish.pa...@wdc.com wrote: > Currently, clocksource registration happens for an invalid cpu > for non-smp kernels. This lead to kernel panic

Re: [PATCH 4/4] RISC-V: Fix non-smp kernel boot on SMP systems

2018-12-07 Thread Atish Patra
On 12/7/18 9:00 AM, Palmer Dabbelt wrote: On Mon, 03 Dec 2018 12:57:31 PST (-0800), atish.pa...@wdc.com wrote: Currently, clocksource registration happens for an invalid cpu for non-smp kernels. This lead to kernel panic as cpu hotplug registration will fail for those cpus. Do not proceed if ha

Re: [PATCH 4/4] RISC-V: Fix non-smp kernel boot on SMP systems

2018-12-07 Thread Palmer Dabbelt
On Mon, 03 Dec 2018 12:57:31 PST (-0800), atish.pa...@wdc.com wrote: Currently, clocksource registration happens for an invalid cpu for non-smp kernels. This lead to kernel panic as cpu hotplug registration will fail for those cpus. Do not proceed if hartid is invalid. Take this opprtunity to pr

[PATCH 4/4] RISC-V: Fix non-smp kernel boot on SMP systems

2018-12-03 Thread Atish Patra
Currently, clocksource registration happens for an invalid cpu for non-smp kernels. This lead to kernel panic as cpu hotplug registration will fail for those cpus. Do not proceed if hartid is invalid. Take this opprtunity to print appropriate error strings for different failure cases. Signed-off-