Rafael,
On Sat, Jan 26, 2013 at 11:24:12PM +0100, Rafael J. Wysocki wrote:
> > As we are moving to multiplatform build, this init function will run
> > on all other platforms built together with highbank. We should
> > probably eliminate that effect.
>
> That change can be made on top of the
Rafael,
On Sat, Jan 26, 2013 at 11:24:12PM +0100, Rafael J. Wysocki wrote:
As we are moving to multiplatform build, this init function will run
on all other platforms built together with highbank. We should
probably eliminate that effect.
That change can be made on top of the Mark's
On Saturday, January 26, 2013 10:39:53 PM Shawn Guo wrote:
> Mark,
>
> On Fri, Jan 25, 2013 at 01:46:45PM -0600, Mark Langsdorf wrote:
> > +static int hb_cpufreq_driver_init(void)
> > +{
> > + struct device *cpu_dev;
> > + struct clk *cpu_clk;
> > + struct device_node *np;
> > + int ret;
Mark,
On Fri, Jan 25, 2013 at 01:46:45PM -0600, Mark Langsdorf wrote:
> +static int hb_cpufreq_driver_init(void)
> +{
> + struct device *cpu_dev;
> + struct clk *cpu_clk;
> + struct device_node *np;
> + int ret;
> +
> + for_each_child_of_node(of_find_node_by_path("/cpus"), np)
Mark,
On Fri, Jan 25, 2013 at 01:46:45PM -0600, Mark Langsdorf wrote:
+static int hb_cpufreq_driver_init(void)
+{
+ struct device *cpu_dev;
+ struct clk *cpu_clk;
+ struct device_node *np;
+ int ret;
+
+ for_each_child_of_node(of_find_node_by_path(/cpus), np)
+
On Saturday, January 26, 2013 10:39:53 PM Shawn Guo wrote:
Mark,
On Fri, Jan 25, 2013 at 01:46:45PM -0600, Mark Langsdorf wrote:
+static int hb_cpufreq_driver_init(void)
+{
+ struct device *cpu_dev;
+ struct clk *cpu_clk;
+ struct device_node *np;
+ int ret;
+
+
Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
A9 cores and the ECME happens over the pl320 IPC channel.
Signed-off-by: Mark Langsdorf
Reviewed-by: Shawn Guo
Reviewed-by: Mike Turquette
---
Changes from
Highbank processors depend on the external ECME to perform voltage
management based on a requested frequency. Communication between the
A9 cores and the ECME happens over the pl320 IPC channel.
Signed-off-by: Mark Langsdorf mark.langsd...@calxeda.com
Reviewed-by: Shawn Guo shawn@linaro.org
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