On 1/27/21 12:45 PM, Cornelia Huck wrote:
On Wed, 27 Jan 2021 08:53:05 -0700
Alex Williamson wrote:
On Wed, 27 Jan 2021 09:23:04 -0500
Matthew Rosato wrote:
On 1/26/21 6:18 PM, Alex Williamson wrote:
On Mon, 25 Jan 2021 09:40:38 -0500
Matthew Rosato wrote:
On 1/22/21 6:48 PM, Alex
On Wed, 27 Jan 2021 08:53:05 -0700
Alex Williamson wrote:
> On Wed, 27 Jan 2021 09:23:04 -0500
> Matthew Rosato wrote:
>
> > On 1/26/21 6:18 PM, Alex Williamson wrote:
> > > On Mon, 25 Jan 2021 09:40:38 -0500
> > > Matthew Rosato wrote:
> > >
> > >> On 1/22/21 6:48 PM, Alex Williamson
On Wed, 27 Jan 2021 09:23:04 -0500
Matthew Rosato wrote:
> On 1/26/21 6:18 PM, Alex Williamson wrote:
> > On Mon, 25 Jan 2021 09:40:38 -0500
> > Matthew Rosato wrote:
> >
> >> On 1/22/21 6:48 PM, Alex Williamson wrote:
> >>> On Tue, 19 Jan 2021 15:02:30 -0500
> >>> Matthew Rosato wrote:
>
On 1/26/21 6:18 PM, Alex Williamson wrote:
On Mon, 25 Jan 2021 09:40:38 -0500
Matthew Rosato wrote:
On 1/22/21 6:48 PM, Alex Williamson wrote:
On Tue, 19 Jan 2021 15:02:30 -0500
Matthew Rosato wrote:
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
specific
On Mon, 25 Jan 2021 09:40:38 -0500
Matthew Rosato wrote:
> On 1/22/21 6:48 PM, Alex Williamson wrote:
> > On Tue, 19 Jan 2021 15:02:30 -0500
> > Matthew Rosato wrote:
> >
> >> Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
> >> specific requirements in terms of
On Mon, 25 Jan 2021 09:40:38 -0500
Matthew Rosato wrote:
> On 1/22/21 6:48 PM, Alex Williamson wrote:
> > On Tue, 19 Jan 2021 15:02:30 -0500
> > Matthew Rosato wrote:
> >
> >> Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
> >> specific requirements in terms of
On 1/22/21 6:48 PM, Alex Williamson wrote:
On Tue, 19 Jan 2021 15:02:30 -0500
Matthew Rosato wrote:
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
specific requirements in terms of alignment as well as the patterns in
which the data is read/written. Allowing these to
On 1/25/21 10:42 AM, Cornelia Huck wrote:
On Mon, 25 Jan 2021 09:40:38 -0500
Matthew Rosato wrote:
On 1/22/21 6:48 PM, Alex Williamson wrote:
On Tue, 19 Jan 2021 15:02:30 -0500
Matthew Rosato wrote:
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
specific
On Tue, 19 Jan 2021 15:02:30 -0500
Matthew Rosato wrote:
> Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
> specific requirements in terms of alignment as well as the patterns in
> which the data is read/written. Allowing these to proceed through the
> typical
On Wed, 20 Jan 2021 14:21:59 +0100
Niklas Schnelle wrote:
> On 1/19/21 9:02 PM, Matthew Rosato wrote:
> > Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
> .. snip ...
> > +
> > +static size_t vfio_pci_zdev_io_rw(struct vfio_pci_device *vdev,
> > +
On 1/21/21 5:01 AM, Niklas Schnelle wrote:
On 1/19/21 9:02 PM, Matthew Rosato wrote:
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
specific requirements in terms of alignment as well as the patterns in
which the data is read/written. Allowing these to proceed through
On 1/19/21 9:02 PM, Matthew Rosato wrote:
> Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
> specific requirements in terms of alignment as well as the patterns in
> which the data is read/written. Allowing these to proceed through the
> typical vfio_pci_bar_rw path will
On 1/20/21 12:28 PM, Niklas Schnelle wrote:
On 1/20/21 6:10 PM, Matthew Rosato wrote:
On 1/20/21 8:21 AM, Niklas Schnelle wrote:
On 1/19/21 9:02 PM, Matthew Rosato wrote:
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
.. snip ...
+
+static size_t
On 1/20/21 6:10 PM, Matthew Rosato wrote:
> On 1/20/21 8:21 AM, Niklas Schnelle wrote:
>>
>>
>> On 1/19/21 9:02 PM, Matthew Rosato wrote:
>>> Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
>> .. snip ...
>>> +
>>> +static size_t vfio_pci_zdev_io_rw(struct vfio_pci_device
On 1/20/21 8:21 AM, Niklas Schnelle wrote:
On 1/19/21 9:02 PM, Matthew Rosato wrote:
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
.. snip ...
+
+static size_t vfio_pci_zdev_io_rw(struct vfio_pci_device *vdev,
+ char __user *buf,
On 1/19/21 9:02 PM, Matthew Rosato wrote:
> Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
.. snip ...
> +
> +static size_t vfio_pci_zdev_io_rw(struct vfio_pci_device *vdev,
> + char __user *buf, size_t count,
> +
Some s390 PCI devices (e.g. ISM) perform I/O operations that have very
specific requirements in terms of alignment as well as the patterns in
which the data is read/written. Allowing these to proceed through the
typical vfio_pci_bar_rw path will cause them to be broken in up in such a
way that
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