On Fri, Feb 28, 2014 at 03:33:11PM +0200, Andy Shevchenko wrote:
> On Fri, 2014-02-28 at 11:36 +0100, Maxime Ripard wrote:
> > Hi Andy,
> >
> > On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
> > > > +static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
> > > > +{
> > >
On Fri, 2014-02-28 at 11:36 +0100, Maxime Ripard wrote:
> Hi Andy,
>
> On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
> > > +static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
> > > +{
> > > + struct sun6i_dma_dev *sdev = (struct sun6i_dma_dev *)dev_id;
> > > + struct
Hi Andy,
On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
> > +static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
> > +{
> > + struct sun6i_dma_dev *sdev = (struct sun6i_dma_dev *)dev_id;
> > + struct sun6i_vchan *vchan;
> > + struct sun6i_pchan *pchan;
> > +
Hi Andy,
On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
+static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
+{
+ struct sun6i_dma_dev *sdev = (struct sun6i_dma_dev *)dev_id;
+ struct sun6i_vchan *vchan;
+ struct sun6i_pchan *pchan;
+ int i, j, ret
On Fri, 2014-02-28 at 11:36 +0100, Maxime Ripard wrote:
Hi Andy,
On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
+static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
+{
+ struct sun6i_dma_dev *sdev = (struct sun6i_dma_dev *)dev_id;
+ struct sun6i_vchan
On Fri, Feb 28, 2014 at 03:33:11PM +0200, Andy Shevchenko wrote:
On Fri, 2014-02-28 at 11:36 +0100, Maxime Ripard wrote:
Hi Andy,
On Tue, Feb 25, 2014 at 01:28:15PM +0200, Andy Shevchenko wrote:
+static irqreturn_t sun6i_dma_interrupt(int irq, void *dev_id)
+{
+ struct
On Mon, 2014-02-24 at 17:22 +0100, Maxime Ripard wrote:
> The Allwinner A31 has a 16 channels DMA controller that it shares with the
> newer A23. Although sharing some similarities with the DMA controller of the
> older Allwinner SoCs, it's significantly different, I don't expect it to be
>
On Mon, 2014-02-24 at 17:22 +0100, Maxime Ripard wrote:
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to share the driver for these two.
The A31 Controller is
The Allwinner A31 has a 16 channels DMA controller that it shares with the
newer A23. Although sharing some similarities with the DMA controller of the
older Allwinner SoCs, it's significantly different, I don't expect it to be
possible to share the driver for these two.
The A31 Controller is
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