Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync

2014-04-28 Thread George Cherian
On 4/28/2014 1:25 PM, Richard Cochran wrote: On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: Enable the Annex F Time Sync explicitly for DRA7x and AM4372. With this enabled the L2 PTP is working. L2 works fine without this bit. If this is needed for V3 hardware, then it should h

Re: [PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync

2014-04-28 Thread Richard Cochran
On Mon, Apr 28, 2014 at 09:40:23AM +0530, George Cherian wrote: > Enable the Annex F Time Sync explicitly for DRA7x and AM4372. > With this enabled the L2 PTP is working. L2 works fine without this bit. If this is needed for V3 hardware, then it should have its own code variant. > while at that

[PATCH 4/6] drivers: net: cpsw: Enable Annexe F Time sync

2014-04-27 Thread George Cherian
Enable the Annex F Time Sync explicitly for DRA7x and AM4372. With this enabled the L2 PTP is working. while at that rename TS_BIT8 to TS_TTL_NONZERO Signed-off-by: George Cherian --- drivers/net/ethernet/ti/cpsw.c | 8 +--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/driv