Re: [PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information

On Thu, Aug 17, 2017 at 09:54:11PM +0300, Mikko Perttunen wrote: > Add note that address/size-cells should be 2 on 64-bit systems, > and add Tegra186-specific register range properties. Generally the cell sizes have nothing to do with the addressing size of the cpu. They should be as small as

Re: [PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information

On Thu, Aug 17, 2017 at 09:54:11PM +0300, Mikko Perttunen wrote: > Add note that address/size-cells should be 2 on 64-bit systems, > and add Tegra186-specific register range properties. Generally the cell sizes have nothing to do with the addressing size of the cpu. They should be as small as

[PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information

Add note that address/size-cells should be 2 on 64-bit systems, and add Tegra186-specific register range properties. Signed-off-by: Mikko Perttunen --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 9 +++-- 1 file changed, 7 insertions(+), 2

[PATCH 4/6] dt-bindings: host1x: Fix and add Tegra186 information

Add note that address/size-cells should be 2 on 64-bit systems, and add Tegra186-specific register range properties. Signed-off-by: Mikko Perttunen --- .../devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt | 9 +++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git