Hi Marc,
I will revise the patch as suggested.
Thanks for the feedback.
Chiawei
> -Original Message-
> From: Marc Zyngier
> Sent: Thursday, January 7, 2021 6:18 PM
> To: ChiaWei Wang
>
> Subject: Re: [PATCH 4/6] irqchip/aspeed: Add Aspeed eSPI interrupt controller
On 2021-01-07 02:59, ChiaWei Wang wrote:
Hi Marc,
-Original Message-
From: Marc Zyngier
Sent: Wednesday, January 6, 2021 6:59 PM
To: ChiaWei Wang
Subject: Re: [PATCH 4/6] irqchip/aspeed: Add Aspeed eSPI interrupt
controller
On 2021-01-06 05:59, Chia-Wei, Wang wrote:
> The e
Hi Marc,
> -Original Message-
> From: Marc Zyngier
> Sent: Wednesday, January 6, 2021 6:59 PM
> To: ChiaWei Wang
> Subject: Re: [PATCH 4/6] irqchip/aspeed: Add Aspeed eSPI interrupt controller
>
> On 2021-01-06 05:59, Chia-Wei, Wang wrote:
> > The eSPI interr
On 2021-01-06 05:59, Chia-Wei, Wang wrote:
The eSPI interrupt controller acts as a SW IRQ number
decoder to correctly control/dispatch interrupts of
the eSPI peripheral, virtual wire, out-of-band, and
flash channels.
Signed-off-by: Chia-Wei, Wang
---
drivers/irqchip/Makefile | 2
The eSPI interrupt controller acts as a SW IRQ number
decoder to correctly control/dispatch interrupts of
the eSPI peripheral, virtual wire, out-of-band, and
flash channels.
Signed-off-by: Chia-Wei, Wang
---
drivers/irqchip/Makefile | 2 +-
drivers/irqchip/irq-aspeed-espi-ic.c | 25
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