On Mon, 18 May 2015, Thomas Gleixner wrote:
On Mon, 18 May 2015, Vikas Shivappa wrote:
On Fri, 15 May 2015, Thomas Gleixner wrote:
On Mon, 11 May 2015, Vikas Shivappa wrote:
+ /*
+* This needs to be fixed
+* to cache the whole PQR instead of just CLOSid.
+* PQR
On Mon, 18 May 2015, Vikas Shivappa wrote:
> On Fri, 15 May 2015, Thomas Gleixner wrote:
> > On Mon, 11 May 2015, Vikas Shivappa wrote:
> > > + /*
> > > + * This needs to be fixed
> > > + * to cache the whole PQR instead of just CLOSid.
> > > + * PQR has closid in high 32 bits and CQM-RMID in lo
On Fri, 15 May 2015, Thomas Gleixner wrote:
On Mon, 11 May 2015, Vikas Shivappa wrote:
struct rdt_subsys_info {
/* Clos Bitmap to keep track of available CLOSids.*/
@@ -24,6 +30,11 @@ struct clos_cbm_map {
unsigned int clos_refcnt;
};
+static inline bool rdt_enabled(void)
+
On Mon, 11 May 2015, Vikas Shivappa wrote:
> struct rdt_subsys_info {
> /* Clos Bitmap to keep track of available CLOSids.*/
> @@ -24,6 +30,11 @@ struct clos_cbm_map {
> unsigned int clos_refcnt;
> };
>
> +static inline bool rdt_enabled(void)
> +{
> + return static_key_false(&rd
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling.
For Cache Allocation, MSR write would let the task fill in the cache
'subset' represented by the cgroup's cache_mask.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel impl
On Fri, 8 May 2015, Peter Zijlstra wrote:
On Thu, May 07, 2015 at 04:15:41PM -0700, Vikas Shivappa wrote:
No.
1) two arch hooks right after one another is FAIL
1a) just 'fix' the existing hook
2) current is cheap and easily obtainable without passing it as
an argument
will fix to just us
On Thu, May 07, 2015 at 04:15:41PM -0700, Vikas Shivappa wrote:
> >No.
> >
> >1) two arch hooks right after one another is FAIL
> >1a) just 'fix' the existing hook
> >2) current is cheap and easily obtainable without passing it as
> > an argument
>
> will fix to just use an existing hook in fini
On Wed, 6 May 2015, Peter Zijlstra wrote:
On Mon, May 04, 2015 at 11:39:21AM -0700, Vikas Shivappa wrote:
--- a/arch/x86/include/asm/switch_to.h
+++ b/arch/x86/include/asm/switch_to.h
@@ -8,6 +8,9 @@ struct tss_struct;
void __switch_to_xtra(struct task_struct *prev_p, struct task_struct *nex
On Tue, May 05, 2015 at 05:19:40PM -0700, Vikas Shivappa wrote:
> However Matt pointed out I could improve this to
> if (static_key_false)
> { rdt_sched_in(); }
> instead of a static inline which i will update. Will update the commit
> message to include these details.
Indeed, that causes mi
On Mon, May 04, 2015 at 11:39:21AM -0700, Vikas Shivappa wrote:
> >>--- a/arch/x86/include/asm/switch_to.h
> >>+++ b/arch/x86/include/asm/switch_to.h
> >>@@ -8,6 +8,9 @@ struct tss_struct;
> >> void __switch_to_xtra(struct task_struct *prev_p, struct task_struct
> >> *next_p,
> >>
On Sat, 2 May 2015, Peter Zijlstra wrote:
On Fri, May 01, 2015 at 06:36:38PM -0700, Vikas Shivappa wrote:
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel implements
On Sat, 2 May 2015, Peter Zijlstra wrote:
On Fri, May 01, 2015 at 06:36:38PM -0700, Vikas Shivappa wrote:
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel implements
On Fri, May 01, 2015 at 06:36:38PM -0700, Vikas Shivappa wrote:
> Adds support for IA32_PQR_ASSOC MSR writes during task scheduling.
>
> The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
> CLOSid. During context switch kernel implements this by writing the
> CLOSid of the cgr
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel implements this by writing the
CLOSid of the cgroup to which the task belongs to the CPU's
IA32_PQR_ASSOC MSR.
For Cache
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel implements this by writing the
CLOSid of the cgroup to which the task belongs to the CPU's
IA32_PQR_ASSOC MSR.
For Cache
Adds support for IA32_PQR_ASSOC MSR writes during task scheduling.
The high 32 bits in the per processor MSR IA32_PQR_ASSOC represents the
CLOSid. During context switch kernel implements this by writing the
CLOSid of the cgroup to which the task belongs to the CPU's
IA32_PQR_ASSOC MSR.
For Cache
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