On Tue, Nov 3, 2020 at 12:57 PM Paul Cercueil wrote:
>
> Hi Daniel,
>
> Le mar. 3 nov. 2020 à 11:17, Daniel Vetter a écrit :
> > On Mon, Nov 02, 2020 at 10:06:51PM +, Paul Cercueil wrote:
> >> With the module parameter ingenic-drm.cached_gem_buffers, it is
> >> possible
> >> to specify
Hi Daniel,
Le mar. 3 nov. 2020 à 11:17, Daniel Vetter a écrit :
On Mon, Nov 02, 2020 at 10:06:51PM +, Paul Cercueil wrote:
With the module parameter ingenic-drm.cached_gem_buffers, it is
possible
to specify that we want GEM buffers backed by non-coherent memory.
This dramatically
On Mon, Nov 02, 2020 at 10:06:51PM +, Paul Cercueil wrote:
> With the module parameter ingenic-drm.cached_gem_buffers, it is possible
> to specify that we want GEM buffers backed by non-coherent memory.
>
> This dramatically speeds up software rendering on Ingenic SoCs, even for
> tasks where
With the module parameter ingenic-drm.cached_gem_buffers, it is possible
to specify that we want GEM buffers backed by non-coherent memory.
This dramatically speeds up software rendering on Ingenic SoCs, even for
tasks where write-combine memory should in theory be faster (e.g. simple
blits).
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