On Sat, Jun 4, 2016 at 5:22 AM, Alan wrote:
>> I would expect those IP blocks to do nothing and not block lower power
>> states if the firmware is not loaded. If that is not the case, I think
>> that should be fixed such that those lower power states are at least
>>
On Sat, Jun 4, 2016 at 5:22 AM, Alan wrote:
>> I would expect those IP blocks to do nothing and not block lower power
>> states if the firmware is not loaded. If that is not the case, I think
>> that should be fixed such that those lower power states are at least
>> available during suspend (if
> I would expect those IP blocks to do nothing and not block lower power
> states if the firmware is not loaded. If that is not the case, I think
> that should be fixed such that those lower power states are at least
> available during suspend (if not during runtime). If your Skylake+
> system is
> I would expect those IP blocks to do nothing and not block lower power
> states if the firmware is not loaded. If that is not the case, I think
> that should be fixed such that those lower power states are at least
> available during suspend (if not during runtime). If your Skylake+
> system is
On Thu, Jun 2, 2016 at 12:53 PM, One Thousand Gnomes
wrote:
>> How would this spuriously trigger during boot? This code is only run
>> during freeze. If there's some issue with not entering S0ix before a
>> module or firmware is loaded, it's better to not use suspend
On Thu, Jun 2, 2016 at 12:53 PM, One Thousand Gnomes
wrote:
>> How would this spuriously trigger during boot? This code is only run
>> during freeze. If there's some issue with not entering S0ix before a
>> module or firmware is loaded, it's better to not use suspend to idle
>> until those are in
> How would this spuriously trigger during boot? This code is only run
> during freeze. If there's some issue with not entering S0ix before a
> module or firmware is loaded, it's better to not use suspend to idle
> until those are in place.
Ok yes you are correct it's not likely to trigger during
> How would this spuriously trigger during boot? This code is only run
> during freeze. If there's some issue with not entering S0ix before a
> module or firmware is loaded, it's better to not use suspend to idle
> until those are in place.
Ok yes you are correct it's not likely to trigger during
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes
wrote:
>
> There are plenty of Skylake configurations where at the moment you won't
> get s0ix entry because the ISH driver is not yet merged. Spamming those
> users with useless messages is not helpful. Likewise on
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes
wrote:
>
> There are plenty of Skylake configurations where at the moment you won't
> get s0ix entry because the ISH driver is not yet merged. Spamming those
> users with useless messages is not helpful. Likewise on systems with
> modular
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes
wrote:
> On Thu, 2 Jun 2016 11:25:05 +0200
> Peter Zijlstra wrote:
>
>> On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote:
>> > +/*
>> > + * Default chosen to have <= 1%
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes
wrote:
> On Thu, 2 Jun 2016 11:25:05 +0200
> Peter Zijlstra wrote:
>
>> On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote:
>> > +/*
>> > + * Default chosen to have <= 1% power increase while allowing fast
>> > detection of
On Thu, 2 Jun 2016 11:25:05 +0200
Peter Zijlstra wrote:
> On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote:
> > +/*
> > + * Default chosen to have <= 1% power increase while allowing fast
> > detection of
> > + * SLP S0 entry errors. Waking up 10
On Thu, 2 Jun 2016 11:25:05 +0200
Peter Zijlstra wrote:
> On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote:
> > +/*
> > + * Default chosen to have <= 1% power increase while allowing fast
> > detection of
> > + * SLP S0 entry errors. Waking up 10 times a second shows ~30%
On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote:
> +/*
> + * Default chosen to have <= 1% power increase while allowing fast detection
> of
> + * SLP S0 entry errors. Waking up 10 times a second shows ~30% increase in
> + * system power on Skylake Y. Waking up once every 10
On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote:
> +/*
> + * Default chosen to have <= 1% power increase while allowing fast detection
> of
> + * SLP S0 entry errors. Waking up 10 times a second shows ~30% increase in
> + * system power on Skylake Y. Waking up once every 10
From: Derek Basehore
This adds validation of S0ix entry and enables it on Skylake. Using
the new timed_freeze function, we program the CPU to wake up X seconds
after entering freeze. After X seconds, it will wake the CPU to check
the S0ix residency counters and make sure
From: Derek Basehore
This adds validation of S0ix entry and enables it on Skylake. Using
the new timed_freeze function, we program the CPU to wake up X seconds
after entering freeze. After X seconds, it will wake the CPU to check
the S0ix residency counters and make sure we entered the lowest
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