Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-06 Thread dbasehore .
On Sat, Jun 4, 2016 at 5:22 AM, Alan wrote: >> I would expect those IP blocks to do nothing and not block lower power >> states if the firmware is not loaded. If that is not the case, I think >> that should be fixed such that those lower power states are at least >>

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-06 Thread dbasehore .
On Sat, Jun 4, 2016 at 5:22 AM, Alan wrote: >> I would expect those IP blocks to do nothing and not block lower power >> states if the firmware is not loaded. If that is not the case, I think >> that should be fixed such that those lower power states are at least >> available during suspend (if

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-04 Thread Alan
> I would expect those IP blocks to do nothing and not block lower power > states if the firmware is not loaded. If that is not the case, I think > that should be fixed such that those lower power states are at least > available during suspend (if not during runtime). If your Skylake+ > system is

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-04 Thread Alan
> I would expect those IP blocks to do nothing and not block lower power > states if the firmware is not loaded. If that is not the case, I think > that should be fixed such that those lower power states are at least > available during suspend (if not during runtime). If your Skylake+ > system is

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread dbasehore .
On Thu, Jun 2, 2016 at 12:53 PM, One Thousand Gnomes wrote: >> How would this spuriously trigger during boot? This code is only run >> during freeze. If there's some issue with not entering S0ix before a >> module or firmware is loaded, it's better to not use suspend

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread dbasehore .
On Thu, Jun 2, 2016 at 12:53 PM, One Thousand Gnomes wrote: >> How would this spuriously trigger during boot? This code is only run >> during freeze. If there's some issue with not entering S0ix before a >> module or firmware is loaded, it's better to not use suspend to idle >> until those are in

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread One Thousand Gnomes
> How would this spuriously trigger during boot? This code is only run > during freeze. If there's some issue with not entering S0ix before a > module or firmware is loaded, it's better to not use suspend to idle > until those are in place. Ok yes you are correct it's not likely to trigger during

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread One Thousand Gnomes
> How would this spuriously trigger during boot? This code is only run > during freeze. If there's some issue with not entering S0ix before a > module or firmware is loaded, it's better to not use suspend to idle > until those are in place. Ok yes you are correct it's not likely to trigger during

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread dbasehore .
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes wrote: > > There are plenty of Skylake configurations where at the moment you won't > get s0ix entry because the ISH driver is not yet merged. Spamming those > users with useless messages is not helpful. Likewise on

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread dbasehore .
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes wrote: > > There are plenty of Skylake configurations where at the moment you won't > get s0ix entry because the ISH driver is not yet merged. Spamming those > users with useless messages is not helpful. Likewise on systems with > modular

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread dbasehore .
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes wrote: > On Thu, 2 Jun 2016 11:25:05 +0200 > Peter Zijlstra wrote: > >> On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote: >> > +/* >> > + * Default chosen to have <= 1%

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread dbasehore .
On Thu, Jun 2, 2016 at 6:23 AM, One Thousand Gnomes wrote: > On Thu, 2 Jun 2016 11:25:05 +0200 > Peter Zijlstra wrote: > >> On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote: >> > +/* >> > + * Default chosen to have <= 1% power increase while allowing fast >> > detection of

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread One Thousand Gnomes
On Thu, 2 Jun 2016 11:25:05 +0200 Peter Zijlstra wrote: > On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote: > > +/* > > + * Default chosen to have <= 1% power increase while allowing fast > > detection of > > + * SLP S0 entry errors. Waking up 10

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread One Thousand Gnomes
On Thu, 2 Jun 2016 11:25:05 +0200 Peter Zijlstra wrote: > On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote: > > +/* > > + * Default chosen to have <= 1% power increase while allowing fast > > detection of > > + * SLP S0 entry errors. Waking up 10 times a second shows ~30%

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread Peter Zijlstra
On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote: > +/* > + * Default chosen to have <= 1% power increase while allowing fast detection > of > + * SLP S0 entry errors. Waking up 10 times a second shows ~30% increase in > + * system power on Skylake Y. Waking up once every 10

Re: [PATCH 5/5] intel_idle: Add S0ix validation

2016-06-02 Thread Peter Zijlstra
On Wed, Jun 01, 2016 at 09:33:29PM -0700, dbaseh...@chromium.org wrote: > +/* > + * Default chosen to have <= 1% power increase while allowing fast detection > of > + * SLP S0 entry errors. Waking up 10 times a second shows ~30% increase in > + * system power on Skylake Y. Waking up once every 10

[PATCH 5/5] intel_idle: Add S0ix validation

2016-06-01 Thread dbasehore
From: Derek Basehore This adds validation of S0ix entry and enables it on Skylake. Using the new timed_freeze function, we program the CPU to wake up X seconds after entering freeze. After X seconds, it will wake the CPU to check the S0ix residency counters and make sure

[PATCH 5/5] intel_idle: Add S0ix validation

2016-06-01 Thread dbasehore
From: Derek Basehore This adds validation of S0ix entry and enables it on Skylake. Using the new timed_freeze function, we program the CPU to wake up X seconds after entering freeze. After X seconds, it will wake the CPU to check the S0ix residency counters and make sure we entered the lowest