On Thu, Sep 17, 2020 at 09:14:33AM +0200, Neil Armstrong wrote:
> On 08/09/2020 10:46, Daniel Vetter wrote:
> > On Tue, Sep 08, 2020 at 10:06:03AM +0200, Neil Armstrong wrote:
> >> Hi,
> >>
> >> On 07/09/2020 20:03, Daniel Vetter wrote:
> >>> On Mon, Sep 07, 2020 at 11:03:29AM +0200, Neil Armstrong
On 08/09/2020 10:46, Daniel Vetter wrote:
> On Tue, Sep 08, 2020 at 10:06:03AM +0200, Neil Armstrong wrote:
>> Hi,
>>
>> On 07/09/2020 20:03, Daniel Vetter wrote:
>>> On Mon, Sep 07, 2020 at 11:03:29AM +0200, Neil Armstrong wrote:
On 07/09/2020 10:44, Daniel Vetter wrote:
> On Mon, Sep 07,
On Tue, Sep 08, 2020 at 10:06:03AM +0200, Neil Armstrong wrote:
> Hi,
>
> On 07/09/2020 20:03, Daniel Vetter wrote:
> > On Mon, Sep 07, 2020 at 11:03:29AM +0200, Neil Armstrong wrote:
> >> On 07/09/2020 10:44, Daniel Vetter wrote:
> >>> On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote
Hi,
On 07/09/2020 20:03, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 11:03:29AM +0200, Neil Armstrong wrote:
>> On 07/09/2020 10:44, Daniel Vetter wrote:
>>> On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
>
On Mon, Sep 07, 2020 at 11:03:29AM +0200, Neil Armstrong wrote:
> On 07/09/2020 10:44, Daniel Vetter wrote:
> > On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
> >> On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
> >>> The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DS
On 07/09/2020 10:44, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
>> On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
>>> The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
>>> with a custom
>>> glue managing the IP r
On Mon, Sep 07, 2020 at 10:43:51AM +0200, Daniel Vetter wrote:
> On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
> > The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
> > with a custom
> > glue managing the IP resets, clock and data input similar to the DW
On Mon, Sep 07, 2020 at 10:18:25AM +0200, Neil Armstrong wrote:
> The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
> with a custom
> glue managing the IP resets, clock and data input similar to the DW-HDMI Glue
> on other
> Amlogic SoCs.
>
> This adds support for the G
The Amlogic AXg SoCs embeds a Synopsys DW-MIPI-DSI transceiver (ver 1.21a),
with a custom
glue managing the IP resets, clock and data input similar to the DW-HDMI Glue
on other
Amlogic SoCs.
This adds support for the Glue managing the transceiver, mimicing the init flow
provided
by Amlogic to s
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