Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-07-03 Thread Dave Hansen
On 06/30/2016 08:06 PM, Brian Gerst wrote: >> > It's not like anybody will ever care about 32-bit page tables on >> > Knights Landing anyway. > Could this affect a 32-bit guest VM? This isn't about 32-bit *mode*. It's about using the the 32-bit 2-level _paging_ mode that supports only 4GB virtual

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-07-01 Thread Eric W. Biederman
Dave Hansen writes: > On 07/01/2016 07:25 AM, Eric W. Biederman wrote: >> Linus Torvalds writes: >>> > On Thu, Jun 30, 2016 at 9:39 PM, Dave Hansen wrote: >> >> I think what you suggest will work if we don't consider A/D in >> pte_none(). I think there are a bunch of code path w

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-07-01 Thread Linus Torvalds
On Fri, Jul 1, 2016 at 9:14 AM, Dave Hansen wrote: > > As I understand it, the erratum only affects a thread which is about to > page fault. The write associated with the dirty bit being set never > actually gets executed. So, the bit really *is* stray and isn't > something we need to preserve.

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-07-01 Thread Dave Hansen
On 07/01/2016 09:07 AM, Linus Torvalds wrote: > But I also started worrying about us just losing sight of the dirty > bit in particular. It's not enough that we ignore the dirty bit - we'd > still want to make sure that the underlying backing page gets marked > dirty, even if the CPU is buggy and e

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-07-01 Thread Linus Torvalds
On Thu, Jun 30, 2016 at 9:39 PM, Dave Hansen wrote: > > I think what you suggest will work if we don't consider A/D in > pte_none(). I think there are a bunch of code path where assume that > !pte_present() && !pte_none() means swap. Hmm. Thinking about it some more, I still think it's a good i

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-07-01 Thread Dave Hansen
On 07/01/2016 07:25 AM, Eric W. Biederman wrote: > Linus Torvalds writes: >> > On Thu, Jun 30, 2016 at 9:39 PM, Dave Hansen wrote: >>> >> >>> >> I think what you suggest will work if we don't consider A/D in >>> >> pte_none(). I think there are a bunch of code path where assume that >>> >> !pte_

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-07-01 Thread Eric W. Biederman
Linus Torvalds writes: > On Thu, Jun 30, 2016 at 9:39 PM, Dave Hansen wrote: >> >> I think what you suggest will work if we don't consider A/D in >> pte_none(). I think there are a bunch of code path where assume that >> !pte_present() && !pte_none() means swap. > > Yeah, we would need to chang

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-06-30 Thread Linus Torvalds
On Thu, Jun 30, 2016 at 9:39 PM, Dave Hansen wrote: > > I think what you suggest will work if we don't consider A/D in > pte_none(). I think there are a bunch of code path where assume that > !pte_present() && !pte_none() means swap. Yeah, we would need to change pte_none() to mask off D/A, but

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-06-30 Thread Dave Hansen
On 06/30/2016 07:55 PM, Linus Torvalds wrote: > On Thu, Jun 30, 2016 at 5:12 PM, Dave Hansen wrote: >> From: Dave Hansen >> The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights >> Landing) has an erratum where a processor thread setting the Accessed >> or Dirty bits may not do so at

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-06-30 Thread Brian Gerst
On Thu, Jun 30, 2016 at 10:55 PM, Linus Torvalds wrote: > On Thu, Jun 30, 2016 at 5:12 PM, Dave Hansen wrote: >> >> From: Dave Hansen >> >> The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights >> Landing) has an erratum where a processor thread setting the Accessed >> or Dirty bits

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-06-30 Thread Linus Torvalds
On Thu, Jun 30, 2016 at 5:12 PM, Dave Hansen wrote: > > From: Dave Hansen > > The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights > Landing) has an erratum where a processor thread setting the Accessed > or Dirty bits may not do so atomically against its checks for the > Present bi

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-06-30 Thread Nadav Amit
Dave Hansen wrote: > +pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long address, > +pte_t *ptep) > +{ > + struct mm_struct *mm = vma->vm_mm; > + pte_t pte; > + > + pte = ptep_get_and_clear(mm, address, ptep); > + if (pte_accessible(mm, pte)) { >

Re: [PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-06-30 Thread Dave Hansen
On 06/30/2016 06:50 PM, Nadav Amit wrote: > Dave Hansen wrote: >> +pte_t ptep_clear_flush(struct vm_area_struct *vma, unsigned long address, >> + pte_t *ptep) >> +{ >> +struct mm_struct *mm = vma->vm_mm; >> +pte_t pte; >> + >> +pte = ptep_get_and_clear(mm, address, pt

[PATCH 6/6] x86: Fix stray A/D bit setting into non-present PTEs

2016-06-30 Thread Dave Hansen
From: Dave Hansen The Intel(R) Xeon Phi(TM) Processor x200 Family (codename: Knights Landing) has an erratum where a processor thread setting the Accessed or Dirty bits may not do so atomically against its checks for the Present bit. This may cause a thread (which is about to page fault) to set