On Sun, Jun 16, 2019 at 04:03:56PM +0200, Jiri Olsa wrote:
> + cfg = array_index_nospec(cfg, NR_RAPL_DOMAINS + 1);
This one fails to build on i386. Istr we had issues like that before.
This makes it build.
diff --git a/arch/x86/events/intel/rapl.c b/arch/x86/events/intel/rapl.c
index ddad45e
There's no need to have special code for getting
the bit and msr value for given event. We can
now easily get it from rapl_msrs array.
Also getting rid of RAPL_IDX_*, which is no longer
needed and replacing INTEL_RAPL* with PERF_RAPL*
enums.
Signed-off-by: Jiri Olsa
---
arch/x86/events/intel/ra
There's no need to have special code for getting
the bit and msr value for given event. We can
now easily get it from rapl_msrs array.
Also getting rid of RAPL_IDX_*, which is no longer
needed and replacing INTEL_RAPL* with PERF_RAPL*
enums.
Signed-off-by: Jiri Olsa
---
arch/x86/events/intel/ra
There's no need to have special code for getting
the bit and msr value for given event. We can
now easily get it from rapl_msrs array.
Also getting rid of RAPL_IDX_*, which is no longer
needed and replacing INTEL_RAPL* with PERF_RAPL*
enums.
Signed-off-by: Jiri Olsa
---
arch/x86/events/intel/ra
There's no need to have special code for getting
the bit and msr value for given event. We can
now easily get it from rapl_msrs array.
Also getting rid of RAPL_IDX_*, which is no longer
needed and replacing INTEL_RAPL* with PERF_RAPL*
enums.
Signed-off-by: Jiri Olsa
---
arch/x86/events/intel/ra
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