On 04/20/2016 04:53 PM, Linus Walleij wrote:
On Tue, Apr 19, 2016 at 2:18 PM, wrote:
From: Patrice Chotard
The particularities of this variant are:
- GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared
to other variants.
- There is no Edge detection, Rising Edge and Fa
On Tue, Apr 19, 2016 at 2:18 PM, wrote:
> From: Patrice Chotard
>
> The particularities of this variant are:
> - GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared
> to other variants.
> - There is no Edge detection, Rising Edge and Falling Edge registers.
> - IRQ flags are
From: Patrice Chotard
The particularities of this variant are:
- GPIO_XXX_LSB and GPIO_XXX_MSB memory locations are inverted compared
to other variants.
- There is no Edge detection, Rising Edge and Falling Edge registers.
- IRQ flags are cleared when read, no need to write in Status register.
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