Re: [PATCH RFC V3 7/9] x86/entry: Preserve PKRS MSR across exceptions

2020-10-14 Thread Ira Weiny
On Wed, Oct 14, 2020 at 09:06:44PM -0700, Dave Hansen wrote: > On 10/14/20 8:46 PM, Ira Weiny wrote: > > On Tue, Oct 13, 2020 at 11:52:32AM -0700, Dave Hansen wrote: > >> On 10/9/20 12:42 PM, ira.we...@intel.com wrote: > >>> @@ -341,6 +341,9 @@ noinstr void irqentry_enter(struct pt_regs *regs, >

Re: [PATCH RFC V3 7/9] x86/entry: Preserve PKRS MSR across exceptions

2020-10-14 Thread Dave Hansen
On 10/14/20 8:46 PM, Ira Weiny wrote: > On Tue, Oct 13, 2020 at 11:52:32AM -0700, Dave Hansen wrote: >> On 10/9/20 12:42 PM, ira.we...@intel.com wrote: >>> @@ -341,6 +341,9 @@ noinstr void irqentry_enter(struct pt_regs *regs, >>> irqentry_state_t *state) >>> /* Use the combo lockdep/tracing

Re: [PATCH RFC V3 7/9] x86/entry: Preserve PKRS MSR across exceptions

2020-10-14 Thread Ira Weiny
On Tue, Oct 13, 2020 at 11:52:32AM -0700, Dave Hansen wrote: > On 10/9/20 12:42 PM, ira.we...@intel.com wrote: > > @@ -341,6 +341,9 @@ noinstr void irqentry_enter(struct pt_regs *regs, > > irqentry_state_t *state) > > /* Use the combo lockdep/tracing function */ > > trace_hardirqs_off();

Re: [PATCH RFC V3 7/9] x86/entry: Preserve PKRS MSR across exceptions

2020-10-13 Thread Dave Hansen
On 10/9/20 12:42 PM, ira.we...@intel.com wrote: > @@ -341,6 +341,9 @@ noinstr void irqentry_enter(struct pt_regs *regs, > irqentry_state_t *state) > /* Use the combo lockdep/tracing function */ > trace_hardirqs_off(); > instrumentation_end(); > + > +done: > +

[PATCH RFC V3 7/9] x86/entry: Preserve PKRS MSR across exceptions

2020-10-09 Thread ira . weiny
From: Ira Weiny The PKRS MSR is not managed by XSAVE. It is preserved through a context switch but this support leaves exception handling code open to memory accesses during exceptions. 2 possible places for preserving this state were considered, irqentry_state_t or pt_regs.[1] pt_regs was