On 11/3/2015 12:43 PM, Sinan Kaya wrote:
In any case, the hardware document says 32 bit configuration space
access to the host bridge only. I'll get more clarification.
I got confirmation this morning that this chip supports 32 bit access to
the root complex configuration space. 8/16/32 bits
On 11/3/2015 12:43 PM, Sinan Kaya wrote:
In any case, the hardware document says 32 bit configuration space
access to the host bridge only. I'll get more clarification.
I got confirmation this morning that this chip supports 32 bit access to
the root complex configuration space. 8/16/32 bits
On 03.11.2015 17:55, Lorenzo Pieralisi wrote:
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
menu "Kernel Features"
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index b3d098b..66cc1ae 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
On 03.11.2015 17:55, Lorenzo Pieralisi wrote:
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
menu "Kernel Features"
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index b3d098b..66cc1ae 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
On 03.11.2015 17:55, Lorenzo Pieralisi wrote:
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
menu "Kernel Features"
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index b3d098b..66cc1ae 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
On 03.11.2015 17:55, Lorenzo Pieralisi wrote:
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
menu "Kernel Features"
diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
index b3d098b..66cc1ae 100644
--- a/arch/arm64/kernel/pci.c
+++ b/arch/arm64/kernel/pci.c
ker...@lists.infradead.org; linux-
> a...@vger.kernel.org; linux-kernel@vger.kernel.org; Gabriele Paoloni; Wangzhou
> (B); liudongdong (C)
> Subject: Re: [PATCH V1 11/11] arm64, pci, acpi: Support for ACPI based PCI
> hostbridge init
>
> On 11/03/2015 07:19 AM, Hanjun Guo wrote:
> > On
On 11/3/2015 11:55 AM, Arnd Bergmann wrote:
On Tuesday 03 November 2015 11:33:18 Sinan Kaya wrote:
On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
I don't see anywhere in the SBSA spec addendum that the PCI
configuration space section
On 11/03/2015 07:19 AM, Hanjun Guo wrote:
On 11/03/2015 10:15 PM, Lorenzo Pieralisi wrote:
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
-int raw_pci_write(unsigned int domain, unsigned int bus,
-unsigned int devfn, int reg, int len, u32 val)
+struct pci_ops
On Tuesday 03 November 2015 11:33:18 Sinan Kaya wrote:
>
> On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
> > On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
> >>
> >> I don't see anywhere in the SBSA spec addendum that the PCI
> >> configuration space section that unaligned accesses *MUST*
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
> menu "Kernel Features"
> diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
> index b3d098b..66cc1ae 100644
> --- a/arch/arm64/kernel/pci.c
> +++ b/arch/arm64/kernel/pci.c
> @@ -11,12 +11,15 @@
> */
>
>
On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
I don't see anywhere in the SBSA spec addendum that the PCI
configuration space section that unaligned accesses *MUST* be supported.
If this is required, please have this info added to the
On Tue, Nov 03, 2015 at 02:32:14PM +, Lorenzo Pieralisi wrote:
> On Wed, Oct 28, 2015 at 11:49:40AM +, liviu.du...@arm.com wrote:
> > On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
>
> [...]
>
> > > +static int __init pcibios_assign_resources(void)
> > > +{
> > > + if
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
>
> I don't see anywhere in the SBSA spec addendum that the PCI
> configuration space section that unaligned accesses *MUST* be supported.
>
> If this is required, please have this info added to the spec. I can work
> with the designers
On 11/03/2015 10:15 PM, Lorenzo Pieralisi wrote:
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
-int raw_pci_write(unsigned int domain, unsigned int bus,
- unsigned int devfn, int reg, int len, u32 val)
+struct pci_ops pci_root_ops = {
+ .map_bus =
On 11/3/2015 9:39 AM, Tomasz Nowicki wrote:
+struct pci_ops pci_root_ops = {
+.map_bus = pci_mcfg_dev_base,
+.read = pci_generic_config_read,
+.write = pci_generic_config_write,
Can you change these with pci_generic_config_read32 and
pci_generic_config_write32? We have some
On 03.11.2015 15:15, Lorenzo Pieralisi wrote:
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
-int raw_pci_write(unsigned int domain, unsigned int bus,
- unsigned int devfn, int reg, int len, u32 val)
+struct pci_ops pci_root_ops = {
+ .map_bus =
On Wed, Oct 28, 2015 at 11:49:40AM +, liviu.du...@arm.com wrote:
> On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
> > +static int __init pcibios_assign_resources(void)
> > +{
> > + if (acpi_disabled)
> > + return 0;
> > +
> > +
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
> >-int raw_pci_write(unsigned int domain, unsigned int bus,
> >-unsigned int devfn, int reg, int len, u32 val)
> >+struct pci_ops pci_root_ops = {
> >+.map_bus = pci_mcfg_dev_base,
> >+.read =
On 11/3/2015 9:39 AM, Tomasz Nowicki wrote:
+struct pci_ops pci_root_ops = {
+.map_bus = pci_mcfg_dev_base,
+.read = pci_generic_config_read,
+.write = pci_generic_config_write,
Can you change these with pci_generic_config_read32 and
pci_generic_config_write32? We have some
On 11/03/2015 07:19 AM, Hanjun Guo wrote:
On 11/03/2015 10:15 PM, Lorenzo Pieralisi wrote:
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
-int raw_pci_write(unsigned int domain, unsigned int bus,
-unsigned int devfn, int reg, int len, u32 val)
+struct pci_ops
ker...@lists.infradead.org; linux-
> a...@vger.kernel.org; linux-kernel@vger.kernel.org; Gabriele Paoloni; Wangzhou
> (B); liudongdong (C)
> Subject: Re: [PATCH V1 11/11] arm64, pci, acpi: Support for ACPI based PCI
> hostbridge init
>
> On 11/03/2015 07:19 AM, Hanjun Guo wrote:
> > On
On Tuesday 03 November 2015 11:33:18 Sinan Kaya wrote:
>
> On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
> > On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
> >>
> >> I don't see anywhere in the SBSA spec addendum that the PCI
> >> configuration space section that unaligned accesses *MUST*
On 11/3/2015 11:55 AM, Arnd Bergmann wrote:
On Tuesday 03 November 2015 11:33:18 Sinan Kaya wrote:
On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
I don't see anywhere in the SBSA spec addendum that the PCI
configuration space section
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
> menu "Kernel Features"
> diff --git a/arch/arm64/kernel/pci.c b/arch/arm64/kernel/pci.c
> index b3d098b..66cc1ae 100644
> --- a/arch/arm64/kernel/pci.c
> +++ b/arch/arm64/kernel/pci.c
> @@ -11,12 +11,15 @@
> */
>
>
On 03.11.2015 15:15, Lorenzo Pieralisi wrote:
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
-int raw_pci_write(unsigned int domain, unsigned int bus,
- unsigned int devfn, int reg, int len, u32 val)
+struct pci_ops pci_root_ops = {
+ .map_bus =
On Wed, Oct 28, 2015 at 11:49:40AM +, liviu.du...@arm.com wrote:
> On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
[...]
> > +static int __init pcibios_assign_resources(void)
> > +{
> > + if (acpi_disabled)
> > + return 0;
> > +
> > +
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
>
> I don't see anywhere in the SBSA spec addendum that the PCI
> configuration space section that unaligned accesses *MUST* be supported.
>
> If this is required, please have this info added to the spec. I can work
> with the designers
On Tue, Nov 03, 2015 at 02:32:14PM +, Lorenzo Pieralisi wrote:
> On Wed, Oct 28, 2015 at 11:49:40AM +, liviu.du...@arm.com wrote:
> > On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
>
> [...]
>
> > > +static int __init pcibios_assign_resources(void)
> > > +{
> > > + if
On 11/03/2015 10:15 PM, Lorenzo Pieralisi wrote:
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
-int raw_pci_write(unsigned int domain, unsigned int bus,
- unsigned int devfn, int reg, int len, u32 val)
+struct pci_ops pci_root_ops = {
+ .map_bus =
On Wed, Oct 28, 2015 at 02:46:37PM -0400, Sinan Kaya wrote:
[...]
> >-int raw_pci_write(unsigned int domain, unsigned int bus,
> >-unsigned int devfn, int reg, int len, u32 val)
> >+struct pci_ops pci_root_ops = {
> >+.map_bus = pci_mcfg_dev_base,
> >+.read =
On 11/3/2015 10:59 AM, Arnd Bergmann wrote:
On Tuesday 03 November 2015 10:10:21 Sinan Kaya wrote:
I don't see anywhere in the SBSA spec addendum that the PCI
configuration space section that unaligned accesses *MUST* be supported.
If this is required, please have this info added to the
On 10/27/2015 12:38 PM, Tomasz Nowicki wrote:
Because of two patch series:
1. Jiang Liu's common interface to support PCI host bridge init
2. Refactoring of MMCONFIG, part of this patch set
now we can think about PCI buses enumeration for ARM64 and ACPI tables.
This patch introduce ACPI based
On Wed, Oct 28, 2015 at 02:42:30PM +0100, Tomasz Nowicki wrote:
> On 28.10.2015 12:49, liviu.du...@arm.com wrote:
> >On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
> >>Because of two patch series:
> >>1. Jiang Liu's common interface to support PCI host bridge init
> >>2.
On 28.10.2015 12:49, liviu.du...@arm.com wrote:
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
Because of two patch series:
1. Jiang Liu's common interface to support PCI host bridge init
2. Refactoring of MMCONFIG, part of this patch set
now we can think about PCI buses
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
> Because of two patch series:
> 1. Jiang Liu's common interface to support PCI host bridge init
> 2. Refactoring of MMCONFIG, part of this patch set
> now we can think about PCI buses enumeration for ARM64 and ACPI tables.
>
> This
On Wed, Oct 28, 2015 at 02:42:30PM +0100, Tomasz Nowicki wrote:
> On 28.10.2015 12:49, liviu.du...@arm.com wrote:
> >On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
> >>Because of two patch series:
> >>1. Jiang Liu's common interface to support PCI host bridge init
> >>2.
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
> Because of two patch series:
> 1. Jiang Liu's common interface to support PCI host bridge init
> 2. Refactoring of MMCONFIG, part of this patch set
> now we can think about PCI buses enumeration for ARM64 and ACPI tables.
>
> This
On 28.10.2015 12:49, liviu.du...@arm.com wrote:
On Tue, Oct 27, 2015 at 05:38:42PM +0100, Tomasz Nowicki wrote:
Because of two patch series:
1. Jiang Liu's common interface to support PCI host bridge init
2. Refactoring of MMCONFIG, part of this patch set
now we can think about PCI buses
On 10/27/2015 12:38 PM, Tomasz Nowicki wrote:
Because of two patch series:
1. Jiang Liu's common interface to support PCI host bridge init
2. Refactoring of MMCONFIG, part of this patch set
now we can think about PCI buses enumeration for ARM64 and ACPI tables.
This patch introduce ACPI based
Because of two patch series:
1. Jiang Liu's common interface to support PCI host bridge init
2. Refactoring of MMCONFIG, part of this patch set
now we can think about PCI buses enumeration for ARM64 and ACPI tables.
This patch introduce ACPI based PCI hostbridge init calls which
use information
Because of two patch series:
1. Jiang Liu's common interface to support PCI host bridge init
2. Refactoring of MMCONFIG, part of this patch set
now we can think about PCI buses enumeration for ARM64 and ACPI tables.
This patch introduce ACPI based PCI hostbridge init calls which
use information
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