Re: [PATCH V2] PCI: exynos: add support for MSI

2013-08-28 Thread Jingoo Han
On Thursday, August 29, 2013 12:45 PM, Pratyush Anand wrote: > On Wed, Aug 28, 2013 at 04:17:24PM +0800, Jingoo Han wrote: > > On Friday, August 23, 2013 5:36 PM, Pratyush Anand wrote: > > > On Fri, Aug 23, 2013 at 02:04:20PM +0800, Jingoo Han wrote: > > > > [...] > > > > #define MAX_PCIE_PORT_SU

Re: [PATCH V2] PCI: exynos: add support for MSI

2013-08-28 Thread Pratyush Anand
On Wed, Aug 28, 2013 at 04:17:24PM +0800, Jingoo Han wrote: > On Friday, August 23, 2013 5:36 PM, Pratyush Anand wrote: > > On Fri, Aug 23, 2013 at 02:04:20PM +0800, Jingoo Han wrote: > [...] > > #define MAX_PCIE_PORT_SUPPORTED 3 > > static DECLARE_BITMAP(msi_irq_in_use[MAX_PCIE_PORT_SUPPORTED],

Re: [PATCH V2] PCI: exynos: add support for MSI

2013-08-28 Thread Jingoo Han
On Friday, August 23, 2013 5:36 PM, Pratyush Anand wrote: > On Fri, Aug 23, 2013 at 02:04:20PM +0800, Jingoo Han wrote: [.] > > +#define MAX_MSI_IRQS 32 > > DW MSI controller can support upto 256. However, 32 seems a practical > choice, as there might not be any system whic

Re: [PATCH V2] PCI: exynos: add support for MSI

2013-08-25 Thread Arnd Bergmann
On Friday 23 August 2013, Thierry Reding wrote: > > > + if (IS_ENABLED(CONFIG_PCI_MSI)) { > > > + if (of_property_read_u32(np, "msi-base", > > > &pp->msi_irq_start)) { > > > + dev_err(pp->dev, "Failed to parse the number of > > > lanes\n"); > > > +

Re: [PATCH V2] PCI: exynos: add support for MSI

2013-08-23 Thread Thierry Reding
On Fri, Aug 23, 2013 at 02:05:39PM +0530, Pratyush Anand wrote: > On Fri, Aug 23, 2013 at 02:04:20PM +0800, Jingoo Han wrote: [...] > > + > > static struct hw_pci dw_pci; > > > > unsigned long global_io_offset; > > @@ -144,6 +152,205 @@ int dw_pcie_wr_own_conf(struct pcie_port *pp, int > > wher

Re: [PATCH V2] PCI: exynos: add support for MSI

2013-08-23 Thread Pratyush Anand
On Fri, Aug 23, 2013 at 02:04:20PM +0800, Jingoo Han wrote: > This patch adds support for Message Signaled Interrupt in the > Exynos PCIe diver using Synopsys designware PCIe core IP. > > Signed-off-by: Siva Reddy Kallam > Signed-off-by: Srikanth T Shivanand > Signed-off-by: Jingoo Han > Cc: Pr

[PATCH V2] PCI: exynos: add support for MSI

2013-08-22 Thread Jingoo Han
This patch adds support for Message Signaled Interrupt in the Exynos PCIe diver using Synopsys designware PCIe core IP. Signed-off-by: Siva Reddy Kallam Signed-off-by: Srikanth T Shivanand Signed-off-by: Jingoo Han Cc: Pratyush Anand Cc: Mohit KUMAR --- Changes since v1: - removed unnecessary