Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-21 Thread Laxman Dewangan
On Wednesday 16 November 2016 12:18 AM, Jon Hunter wrote: On 09/11/16 13:06, Laxman Dewangan wrote: +NVIDIA Tegra124 and later SoCs support the multi-voltage level and +low power state of some of its IO pads. When IO interface are not +used then IO pads can be configure in low power state to

Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-21 Thread Laxman Dewangan
On Wednesday 16 November 2016 12:18 AM, Jon Hunter wrote: On 09/11/16 13:06, Laxman Dewangan wrote: +NVIDIA Tegra124 and later SoCs support the multi-voltage level and +low power state of some of its IO pads. When IO interface are not +used then IO pads can be configure in low power state to

Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-15 Thread Jon Hunter
On 09/11/16 13:06, Laxman Dewangan wrote: > NVIDIA Tegra124 and later SoCs support the multi-voltage level and > low power state of some of its IO pads. The IO pads can work in > the voltage of the 1.8V and 3.3V of IO voltage from IO power rail > sources. When IO interfaces are not used then IO

Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-15 Thread Jon Hunter
On 09/11/16 13:06, Laxman Dewangan wrote: > NVIDIA Tegra124 and later SoCs support the multi-voltage level and > low power state of some of its IO pads. The IO pads can work in > the voltage of the 1.8V and 3.3V of IO voltage from IO power rail > sources. When IO interfaces are not used then IO

Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-15 Thread Laxman Dewangan
On Tuesday 15 November 2016 01:04 AM, Rob Herring wrote: On Wed, Nov 09, 2016 at 06:36:21PM +0530, Laxman Dewangan wrote: + + audio { + pins = "audio", "dmic", "sdmmc3"; What's the purpose of grouping these? Just to show that multiple IO

Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-15 Thread Laxman Dewangan
On Tuesday 15 November 2016 01:04 AM, Rob Herring wrote: On Wed, Nov 09, 2016 at 06:36:21PM +0530, Laxman Dewangan wrote: + + audio { + pins = "audio", "dmic", "sdmmc3"; What's the purpose of grouping these? Just to show that multiple IO

Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-14 Thread Rob Herring
On Wed, Nov 09, 2016 at 06:36:21PM +0530, Laxman Dewangan wrote: > NVIDIA Tegra124 and later SoCs support the multi-voltage level and > low power state of some of its IO pads. The IO pads can work in > the voltage of the 1.8V and 3.3V of IO voltage from IO power rail > sources. When IO interfaces

Re: [PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-14 Thread Rob Herring
On Wed, Nov 09, 2016 at 06:36:21PM +0530, Laxman Dewangan wrote: > NVIDIA Tegra124 and later SoCs support the multi-voltage level and > low power state of some of its IO pads. The IO pads can work in > the voltage of the 1.8V and 3.3V of IO voltage from IO power rail > sources. When IO interfaces

[PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-09 Thread Laxman Dewangan
NVIDIA Tegra124 and later SoCs support the multi-voltage level and low power state of some of its IO pads. The IO pads can work in the voltage of the 1.8V and 3.3V of IO voltage from IO power rail sources. When IO interfaces are not used then IO pads can be configure in low power state to reduce

[PATCH V2 1/2] pinctrl: tegra: Add DT binding for io pads control

2016-11-09 Thread Laxman Dewangan
NVIDIA Tegra124 and later SoCs support the multi-voltage level and low power state of some of its IO pads. The IO pads can work in the voltage of the 1.8V and 3.3V of IO voltage from IO power rail sources. When IO interfaces are not used then IO pads can be configure in low power state to reduce